diff options
author | Martin Roth <gaumless@gmail.com> | 2023-04-19 13:40:06 -0600 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-04-21 15:33:09 +0000 |
commit | cc827d9aab1f0ef25a77ebc64755cf4454857f4b (patch) | |
tree | 1619bccb96df348853d14ba3ef771966d11411a7 /src/cpu/amd | |
parent | c9ce5f6ec8f60cfd56eca127680032b3c6ed38de (diff) |
soc/amd/phoenix: Mark PCIe GPP bridges as hidden instead of off
When one of the General-Purpose PCIe bridges is not used, it doesn't
show up on the PCI bus at all, so coreboot notes it as an issue in the
devicetree. This happens even if the device is marked as off.
To solve this, we're marking the GPP bridge devices in devicetree as
hidden, so they'll only show up in devicetree if they're actually used
on a mainboard.
BUG=b:277997811
TEST=Build
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I7b7577baa2dbb0ea7ebbcdb1a8ae81770e61d76f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74527
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/amd')
0 files changed, 0 insertions, 0 deletions