diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2022-02-24 00:51:11 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-25 17:44:45 +0000 |
| commit | 928a9c8f048874018ab14a0c66108c22b7b04da2 (patch) | |
| tree | 3e142c48e7d2471ce534be514e4f709628e5ec88 /src/cpu/amd | |
| parent | 972d9f2cce2792b847c4c1879f5b52c19585c37c (diff) | |
cpu,mb,nb,soc: use HPET_BASE_ADDRESS instead of magic number
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I570f7de90007b67d811d158ca33e099d5cc2d5d3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62308
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/amd')
| -rw-r--r-- | src/cpu/amd/agesa/family14/fixme.c | 3 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family15tn/fixme.c | 3 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family16kb/fixme.c | 3 | ||||
| -rw-r--r-- | src/cpu/amd/pi/00730F01/fixme.c | 3 |
4 files changed, 8 insertions, 4 deletions
diff --git a/src/cpu/amd/agesa/family14/fixme.c b/src/cpu/amd/agesa/family14/fixme.c index b47c4f0f65..16caf40f15 100644 --- a/src/cpu/amd/agesa/family14/fixme.c +++ b/src/cpu/amd/agesa/family14/fixme.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <arch/hpet.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> @@ -28,7 +29,7 @@ void amd_initcpuio(void) PciData |= 1 << 7; // set NP (non-posted) bit LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0x80); - PciData = (0xFED00000 >> 8) | 3; // lowest NP address is HPET at FED00000 + PciData = (HPET_BASE_ADDRESS >> 8) | 3; // lowest NP address is HPET at FED00000 LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); /* Map the remaining PCI hole as posted MMIO */ diff --git a/src/cpu/amd/agesa/family15tn/fixme.c b/src/cpu/amd/agesa/family15tn/fixme.c index ebfa07da08..feb85bfe43 100644 --- a/src/cpu/amd/agesa/family15tn/fixme.c +++ b/src/cpu/amd/agesa/family15tn/fixme.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <arch/hpet.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> @@ -28,7 +29,7 @@ void amd_initcpuio(void) PciData |= 1 << 7; /* set NP (non-posted) bit */ LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0x80); - PciData = (0xFED00000 >> 8) | 3; /* lowest NP address is HPET at FED00000 */ + PciData = (HPET_BASE_ADDRESS >> 8) | 3; /* lowest NP address is HPET at FED00000 */ LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); /* Map the remaining PCI hole as posted MMIO */ diff --git a/src/cpu/amd/agesa/family16kb/fixme.c b/src/cpu/amd/agesa/family16kb/fixme.c index 3771a064c7..5e43b17d3b 100644 --- a/src/cpu/amd/agesa/family16kb/fixme.c +++ b/src/cpu/amd/agesa/family16kb/fixme.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <arch/hpet.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> @@ -28,7 +29,7 @@ void amd_initcpuio(void) PciData |= 1 << 7; /* set NP (non-posted) bit */ LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x80); - PciData = (0xFED00000 >> 8) | 3; /* lowest NP address is HPET at FED00000 */ + PciData = (HPET_BASE_ADDRESS >> 8) | 3; /* lowest NP address is HPET at FED00000 */ LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); /* Map the remaining PCI hole as posted MMIO */ diff --git a/src/cpu/amd/pi/00730F01/fixme.c b/src/cpu/amd/pi/00730F01/fixme.c index 9b208ecc4c..689fdecd15 100644 --- a/src/cpu/amd/pi/00730F01/fixme.c +++ b/src/cpu/amd/pi/00730F01/fixme.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <arch/hpet.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> @@ -32,7 +33,7 @@ void amd_initcpuio(void) LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0x80); /* lowest NP address is HPET at FED00000 */ - PciData = (0xFED00000 >> 8) | 3; + PciData = (HPET_BASE_ADDRESS >> 8) | 3; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); /* Map the remaining PCI hole as posted MMIO */ |