diff options
author | huang lin <hl@rock-chips.com> | 2014-11-25 09:27:13 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-10 20:51:18 +0200 |
commit | 2e2288de350f8d64ff8c4023eaf71f763d9e1a7f (patch) | |
tree | 013835b0eb6009ebe5aa257fe67e390611108575 /src/cpu/amd | |
parent | f757bf8e769333f850e03f150d1973862a978644 (diff) |
rk3288: reset edp after edp clock source select
edp must reset when device power up, otherwise the edp
register maybe uncertain, now the edp source clock default
select 27M, and in pinky and jerry board we use 24M as edp
sourec clock, if we want to reset edp, we must after the clock
source select 24M.
BUG=chrome-os-partner:34023
TEST=Booted Veyron jerry and read edid normal
BRANCH=None
Change-Id: I4b03dbabe5d3d595d2d56efb0cd82f510f8d2e1b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2292da77cc2322b85c4b4f4f20e4ebcc4c4d060d
Original-Change-Id: Ica031d2d52deb539c1a0a56968786d6952b3d0e8
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/231336
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-on: http://review.coreboot.org/9555
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/amd')
0 files changed, 0 insertions, 0 deletions