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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-10-22 22:07:43 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-25 20:18:40 +0000
commit2d4986c1683ca4a77a93a5ba63e481f7c5862693 (patch)
treef3e800c7aef6d64e2ffb109b96feea5ccaf714e4 /src/cpu/amd
parentac1bba8e34ea7b2c9112b19c4d7e63e74949a899 (diff)
cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs
All x86-based CPUs and SoCs in the coreboot tree end up including the Makefile in cpu/x86/mtrr, so include this directly in the Makefile in cpu/x86 to add it for all x86 CPUs/SoCs. In the unlikely case that a new x86 CPU/SoC will be added, a CPU_X86_MTRR Kconfig option that is selected be default could be added and the new CPU/SoC without MTRR support can override this option that then will be used in the Makefile to guard adding the Makefile from the cpu/x86/mtrr sub-directory. In cpu/intel all models except model 2065X and 206AX are selcted by a socket and rely on the socket's Makefile.inc to add x86/mtrr to the subdirs, so those models don't add x86/mtrr themselves. The Intel Broadwell SoC selects CPU_INTEL_HASWELL and which added x86/mtrr to the subdirs. The Intel Xeon SP SoC directory contains two sub-folders for different versions or generations which both add x86/mtrr to the subdirs in their Makefiles. Change-Id: I743eaac99a85a5c712241ba48a320243c5a51f76 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44230 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/cpu/amd')
-rw-r--r--src/cpu/amd/agesa/family14/Makefile.inc1
-rw-r--r--src/cpu/amd/agesa/family15tn/Makefile.inc1
-rw-r--r--src/cpu/amd/agesa/family16kb/Makefile.inc1
-rw-r--r--src/cpu/amd/pi/00730F01/Makefile.inc1
4 files changed, 0 insertions, 4 deletions
diff --git a/src/cpu/amd/agesa/family14/Makefile.inc b/src/cpu/amd/agesa/family14/Makefile.inc
index c9074d87ac..14971009d9 100644
--- a/src/cpu/amd/agesa/family14/Makefile.inc
+++ b/src/cpu/amd/agesa/family14/Makefile.inc
@@ -9,5 +9,4 @@ ramstage-y += model_14_init.c
subdirs-y += ../../mtrr
subdirs-y += ../../../x86/lapic
subdirs-y += ../../../x86/cache
-subdirs-y += ../../../x86/mtrr
subdirs-y += ../../../x86/pae
diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc
index 42e1c2c7b2..af06dd17a0 100644
--- a/src/cpu/amd/agesa/family15tn/Makefile.inc
+++ b/src/cpu/amd/agesa/family15tn/Makefile.inc
@@ -12,5 +12,4 @@ subdirs-y += ../../mtrr
subdirs-y += ../../smm
subdirs-y += ../../../x86/lapic
subdirs-y += ../../../x86/cache
-subdirs-y += ../../../x86/mtrr
subdirs-y += ../../../x86/pae
diff --git a/src/cpu/amd/agesa/family16kb/Makefile.inc b/src/cpu/amd/agesa/family16kb/Makefile.inc
index 05e61ea36d..f466bbcff7 100644
--- a/src/cpu/amd/agesa/family16kb/Makefile.inc
+++ b/src/cpu/amd/agesa/family16kb/Makefile.inc
@@ -9,5 +9,4 @@ ramstage-y += model_16_init.c
subdirs-y += ../../mtrr
subdirs-y += ../../../x86/lapic
subdirs-y += ../../../x86/cache
-subdirs-y += ../../../x86/mtrr
subdirs-y += ../../../x86/pae
diff --git a/src/cpu/amd/pi/00730F01/Makefile.inc b/src/cpu/amd/pi/00730F01/Makefile.inc
index 446be5d14f..9f410824a4 100644
--- a/src/cpu/amd/pi/00730F01/Makefile.inc
+++ b/src/cpu/amd/pi/00730F01/Makefile.inc
@@ -10,5 +10,4 @@ ramstage-y += update_microcode.c
subdirs-y += ../../mtrr
subdirs-y += ../../../x86/lapic
subdirs-y += ../../../x86/cache
-subdirs-y += ../../../x86/mtrr
subdirs-y += ../../../x86/pae