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| author | Christopher Kilgour <techie@whiterocker.com> | 2013-06-15 23:52:36 -0700 |
|---|---|---|
| committer | Christian Gmeiner <christian.gmeiner@gmail.com> | 2013-06-17 08:26:59 +0200 |
| commit | 156ff1304905845736834d33b6a2d04ef5773ec5 (patch) | |
| tree | dcbd7f725e0b4339282a810b89f9c2129b28e0ce /src/cpu/amd | |
| parent | 04372975bd2d5c1ac94c6358a32cfdcafccc26e3 (diff) | |
cpu/amd/geode_lx/cache_as_ram.inc: Use $ for constant value instead of memory reference
An uninitialized RAM value was used to select an MSR because a $ was forgotten
in front of `CPU_DM_CONFIG0`. It should be the constant value 0x1800, corresponding
to CPU_DM_CONFIG0 MSR defined in `src/include/cpu/amd/lxdef.h`.
Change-Id: Id53ca98b06cc4a9b55916fd8db23904f98008d45
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Reviewed-on: http://review.coreboot.org/3478
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Diffstat (limited to 'src/cpu/amd')
| -rw-r--r-- | src/cpu/amd/geode_lx/cache_as_ram.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/amd/geode_lx/cache_as_ram.inc b/src/cpu/amd/geode_lx/cache_as_ram.inc index d2c241565e..45fd16691b 100644 --- a/src/cpu/amd/geode_lx/cache_as_ram.inc +++ b/src/cpu/amd/geode_lx/cache_as_ram.inc @@ -46,7 +46,7 @@ DCacheSetup: wrmsr /* in LX DCDIS is set after POR which disables the cache..., clear this bit */ - movl CPU_DM_CONFIG0,%ecx + movl $CPU_DM_CONFIG0,%ecx rdmsr andl $(~(DM_CONFIG0_LOWER_DCDIS_SET)), %eax /* TODO: make consistent with i$ init, either whole reg = 0, or just this bit... */ wrmsr |