diff options
| author | Myles Watson <mylesgw@gmail.com> | 2010-03-22 16:33:25 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2010-03-22 16:33:25 +0000 |
| commit | 08e0fb881093c977488de6e8d701dd69369123ec (patch) | |
| tree | 5a7d8aa8415a0b2143ed6f4d52af87191a33561c /src/cpu/amd | |
| parent | 53b0ea4bf24c0ae51aa9f8447d4ce9d44d46af72 (diff) | |
Fix all the format string warnings.
Some other random warnings.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5268 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd')
| -rw-r--r-- | src/cpu/amd/car/post_cache_as_ram.c | 2 | ||||
| -rw-r--r-- | src/cpu/amd/model_gx2/cpubug.c | 2 | ||||
| -rw-r--r-- | src/cpu/amd/sc520/sc520.c | 9 |
3 files changed, 7 insertions, 6 deletions
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c index 939990997c..7f14b1eb8d 100644 --- a/src/cpu/amd/car/post_cache_as_ram.c +++ b/src/cpu/amd/car/post_cache_as_ram.c @@ -97,7 +97,7 @@ static void post_cache_as_ram(void) /* clear only coreboot used region of memory. Note: this may break ECC enabled boards */ memset((void*) CONFIG_RAMBASE, 0, (CONFIG_RAMTOP) - CONFIG_RAMBASE - CONFIG_DCACHE_RAM_SIZE); #else - memset((void*)0, 0, ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_SIZE)); + //memset((void*)CONFIG_RAMBASE, 0, ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_SIZE - 0xa0000)); #endif print_debug("Done\r\n"); diff --git a/src/cpu/amd/model_gx2/cpubug.c b/src/cpu/amd/model_gx2/cpubug.c index fcee30bb23..20284e04c2 100644 --- a/src/cpu/amd/model_gx2/cpubug.c +++ b/src/cpu/amd/model_gx2/cpubug.c @@ -356,7 +356,7 @@ cpubug(void) rev = msr.lo & 0xff; if (rev < 0x20) { - printk(BIOS_ERR, "%s: rev < 0x20! bailing!\n"); + printk(BIOS_ERR, "%s: rev < 0x20! bailing!\n", __func__); return; } printk(BIOS_DEBUG, "Doing cpubug fixes for rev 0x%x\n", rev); diff --git a/src/cpu/amd/sc520/sc520.c b/src/cpu/amd/sc520/sc520.c index 3ab65c2ae1..07991825cd 100644 --- a/src/cpu/amd/sc520/sc520.c +++ b/src/cpu/amd/sc520/sc520.c @@ -12,11 +12,12 @@ #include <stdlib.h> #include <string.h> #include <bitops.h> +#include <delay.h> #include "chip.h" /* hack for now */ -void sc520_udelay(int microseconds) { +static void sc520_udelay(int microseconds) { volatile int x; for(x = 0; x < 1000; x++) ; @@ -24,7 +25,7 @@ void sc520_udelay(int microseconds) { /* looks like we define this now */ void -udelay(int microseconds) { +udelay(unsigned microseconds) { sc520_udelay(microseconds); } /* @@ -46,7 +47,7 @@ static void cpu_init(device_t dev) * there is no real northbridge, keep it here in cpu. * Ron wins, he's writing the code. */ -void sc520_enable_resources(struct device *dev) { +static void sc520_enable_resources(struct device *dev) { unsigned char command; printk(BIOS_SPEW, "%s\n", __func__); @@ -100,7 +101,7 @@ static void ram_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek) { struct resource *resource; - printk(BIOS_SPEW, "%s sizek 0x%x\n", __func__, sizek); + printk(BIOS_SPEW, "%s sizek 0x%lx\n", __func__, sizek); if (!sizek) { return; } |