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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-27 15:25:14 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-07-15 12:20:21 +0200
commitf32d5b8b66cb3679942501c39ee76587b8c0b0f1 (patch)
tree35d46f0bcaec1c883b2f6a74812dea964a2f8bab /src/cpu/amd/pi/s3_resume.h
parentbd274e1363b633c48650821e97953482ebd8d48a (diff)
AMD binaryPI: Split romstage ram stack
Change-Id: Ibbff1fdb1af247550815532ef12f078229f12321 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15467 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/amd/pi/s3_resume.h')
-rw-r--r--src/cpu/amd/pi/s3_resume.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/amd/pi/s3_resume.h b/src/cpu/amd/pi/s3_resume.h
index f952055f88..c23c6621e4 100644
--- a/src/cpu/amd/pi/s3_resume.h
+++ b/src/cpu/amd/pi/s3_resume.h
@@ -31,4 +31,7 @@ void OemAgesaSaveMtrr (void);
void spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len);
+/* This covers node 0 only. */
+#define HIGH_ROMSTAGE_STACK_SIZE (0x48000 - BSP_STACK_BASE_ADDR)
+
#endif