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authorElyes HAOUAS <ehaouas@noos.fr>2017-06-27 22:54:42 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2017-06-28 00:23:32 +0000
commit168ef399c43ad79a40a8bbb2de921a2bd906b3f5 (patch)
tree16613245bebd7920cf3e7ce41f0d7bb5441f05e2 /src/cpu/amd/mtrr
parent70083a1de9e12d8dbd3ba70e7a36a7282090f0e0 (diff)
cpu/*: Add whitespace around '<<'
Change-Id: Id46c0b57bd7c9b954b29537c70254df947690e0b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/20397 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/amd/mtrr')
-rw-r--r--src/cpu/amd/mtrr/amd_mtrr.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c
index 106cb7949d..8cb6658d18 100644
--- a/src/cpu/amd/mtrr/amd_mtrr.c
+++ b/src/cpu/amd/mtrr/amd_mtrr.c
@@ -54,8 +54,8 @@ void setup_bsp_ramtop(void)
"%s, TOP MEM2: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
__func__, msr2.lo, msr2.hi);
- amd_topmem = (uint64_t) msr.hi<<32 | msr.lo;
- amd_topmem2 = (uint64_t) msr2.hi<<32 | msr2.lo;
+ amd_topmem = (uint64_t) msr.hi << 32 | msr.lo;
+ amd_topmem2 = (uint64_t) msr2.hi << 32 | msr2.lo;
}
static void setup_ap_ramtop(void)
@@ -128,7 +128,7 @@ void amd_setup_mtrrs(void)
/* if DRAM above 4GB: set SYSCFG_MSR_TOM2En and SYSCFG_MSR_TOM2WB */
sys_cfg.lo &= ~(SYSCFG_MSR_TOM2En | SYSCFG_MSR_TOM2WB);
- if (bsp_topmem2() > (uint64_t)1<<32) {
+ if (bsp_topmem2() > (uint64_t)1 << 32) {
sys_cfg.lo |= SYSCFG_MSR_TOM2En;
if (has_tom2wb)
sys_cfg.lo |= SYSCFG_MSR_TOM2WB;