diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2008-01-18 15:08:58 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2008-01-18 15:08:58 +0000 |
| commit | f8ee1806ac524bc782c93eccc59ee3c929abddb9 (patch) | |
| tree | 7daab6b3aa82476a10d38fbf68068f4a409d2ce9 /src/cpu/amd/model_lx/cache_as_ram.inc | |
| parent | 7e61e45402aba2b90997f4f02ca8266cf65a229a (diff) | |
Rename almost all occurences of LinuxBIOS to coreboot.
Due to the automatic nature of this update, I am self-acking. It worked in
abuild.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/model_lx/cache_as_ram.inc')
| -rw-r--r-- | src/cpu/amd/model_lx/cache_as_ram.inc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/amd/model_lx/cache_as_ram.inc b/src/cpu/amd/model_lx/cache_as_ram.inc index acd85c5185..a92f474457 100644 --- a/src/cpu/amd/model_lx/cache_as_ram.inc +++ b/src/cpu/amd/model_lx/cache_as_ram.inc @@ -17,7 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define LX_STACK_BASE DCACHE_RAM_BASE /* this is where the DCache will be mapped and be used as stack, It would be cool if it was the same base as LinuxBIOS normal stack */ +#define LX_STACK_BASE DCACHE_RAM_BASE /* this is where the DCache will be mapped and be used as stack, It would be cool if it was the same base as coreboot normal stack */ #define LX_STACK_END LX_STACK_BASE+(DCACHE_RAM_SIZE-1) #define LX_NUM_CACHELINES 0x080 /* there are 128lines per way */ @@ -213,7 +213,7 @@ __main: cld /* clear direction flag */ - /* copy linuxBIOS from it's initial load location to + /* copy coreboot from it's initial load location to * the location it is compiled to run at. * Normally this is copying from FLASH ROM to RAM. */ @@ -363,8 +363,8 @@ crt_console_tx_string: #if defined(CONSOLE_DEBUG_TX_STRING) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) .section ".rom.data" -str_copying_to_ram: .string "Copying LinuxBIOS to ram.\r\n" -str_pre_main: .string "Jumping to LinuxBIOS.\r\n" +str_copying_to_ram: .string "Copying coreboot to ram.\r\n" +str_pre_main: .string "Jumping to coreboot.\r\n" .previous #endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ |