diff options
author | Ronald G. Minnich <rminnich@gmail.com> | 2006-01-27 23:46:30 +0000 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-01-27 23:46:30 +0000 |
commit | 2bb216a880d2358c25b305ce613d8dd5aecd90ac (patch) | |
tree | fd3a00201840659c994d6d0c32df280cb268e91c /src/cpu/amd/model_gx2/gx_setup.inc | |
parent | 05c743a5ebf715f788a62fded7e9896e6e6c6d63 (diff) |
adding preliminary, and almost certainly wrong, rumba support.
This is just a skeleton, basically, and will most likely not even
compile yet.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/model_gx2/gx_setup.inc')
-rw-r--r-- | src/cpu/amd/model_gx2/gx_setup.inc | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/src/cpu/amd/model_gx2/gx_setup.inc b/src/cpu/amd/model_gx2/gx_setup.inc new file mode 100644 index 0000000000..ce9d46d374 --- /dev/null +++ b/src/cpu/amd/model_gx2/gx_setup.inc @@ -0,0 +1,47 @@ +/* + freebios/src/northbridge/nsc/gx2/gx_setup.inc + + Copyright (c) 2002 Christer Weinigel <wingel@hack.org> + + Setup the GX_BASE registers on a National Semiconductor Geode CPU +*/ + +#include <cpu/amd/gx2def.h> + + movl %eax, %ebp /* Preserve bist */ + +gx_setup_start: + leal gx_setup_table, %esi + movl $gx_setup_len, %ecx + movl $GX_BASE, %edi + +gx_setup_loop: + movw (%esi), %di /* Only read the low word of address */ + addl $4, %esi + movl (%esi), %eax /* Data */ + addl $4, %esi + movl %eax, (%edi) + loop gx_setup_loop + + jmp gx_setup_end + +gx_setup_table: + /* Allow writes to config registers */ + .long DC_UNLOCK, DC_UNLOCK_MAGIC + .long DC_GENERAL_CFG, 0 + .long DC_UNLOCK, 0 + + .long BC_DRAM_TOP, 0x3fffffff + .long BC_XMAP_1, 0x60 + .long BC_XMAP_2, 0 + .long BC_XMAP_3, 0 + + .long MC_BANK_CFG, 0x00700070 /* No DIMMS installed */ + .long MC_MEM_CNTRL1, XBUSARB + .long MC_GBASE_ADD, 0x7ff /* Almost 1GB */ +gx_setup_len = (.-gx_setup_table)/8 + +gx_setup_end: + nop + + movl %ebp, %eax /* Restore bist */ |