diff options
| author | Yinghai Lu <yinghailu@gmail.com> | 2005-12-14 02:39:33 +0000 |
|---|---|---|
| committer | Yinghai Lu <yinghailu@gmail.com> | 2005-12-14 02:39:33 +0000 |
| commit | 72ee9b0ebefa98e05867712eb303269836ec69b4 (patch) | |
| tree | 7d732c54abe754f14f1e1e5d93df302b1e04318f /src/cpu/amd/model_fxx | |
| parent | f42e1770f968adbb4d197917d130219d193081a3 (diff) | |
issue 51 and 52: set mtrr for ap before stop it, and _RAMBASE above 1M
support and pgtbl after 1M support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2142 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/model_fxx')
| -rw-r--r-- | src/cpu/amd/model_fxx/init_cpus.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/amd/model_fxx/init_cpus.c b/src/cpu/amd/model_fxx/init_cpus.c index 718a0f6295..6a070d56ec 100644 --- a/src/cpu/amd/model_fxx/init_cpus.c +++ b/src/cpu/amd/model_fxx/init_cpus.c @@ -257,6 +257,7 @@ static unsigned init_cpus(unsigned cpu_init_detectedx) lapic_write(LAPIC_MSG_REG, (apicid<<24) | 0x44); // bsp can not check it before stop_this_cpu disable_cache_as_ram(); // inline + set_1m_ram(); // inline stop_this_cpu(); // inline, it will stop all cores except node0/core0 the bsp .... } |