diff options
| author | Myles Watson <mylesgw@gmail.com> | 2010-04-09 04:01:55 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2010-04-09 04:01:55 +0000 |
| commit | c58f1d1df610e6fb819240919749974045d3c636 (patch) | |
| tree | e3e0bf70ee9e651f63bc46078e9a52bf457cfafc /src/cpu/amd/model_10xxx | |
| parent | ae60855f918dfc7f3f560528296fdd2d4b4ca791 (diff) | |
Indent model_fxx_init and model_10xx_init.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5385 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/model_10xxx')
| -rw-r--r-- | src/cpu/amd/model_10xxx/model_10xxx_init.c | 39 |
1 files changed, 19 insertions, 20 deletions
diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c index 4850ea0203..d0511a75ce 100644 --- a/src/cpu/amd/model_10xxx/model_10xxx_init.c +++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c @@ -43,26 +43,24 @@ extern device_t get_node_pci(u32 nodeid, u32 fn); msr_t rdmsr_amd(u32 index) { - msr_t result; - __asm__ __volatile__ ( - "rdmsr" - : "=a" (result.lo), "=d" (result.hi) - : "c" (index), "D" (0x9c5a203a) - ); - return result; + msr_t result; + __asm__ __volatile__( + "rdmsr" + :"=a"(result.lo), "=d"(result.hi) + :"c"(index), "D"(0x9c5a203a) + ); + return result; } - void wrmsr_amd(u32 index, msr_t msr) { - __asm__ __volatile__ ( + __asm__ __volatile__( "wrmsr" - : /* No outputs */ - : "c" (index), "a" (msr.lo), "d" (msr.hi), "D" (0x9c5a203a) - ); + : /* No outputs */ + :"c"(index), "a"(msr.lo), "d"(msr.hi), "D"(0x9c5a203a) + ); } - static void model_10xxx_init(device_t dev) { u8 i; @@ -72,7 +70,7 @@ static void model_10xxx_init(device_t dev) u32 siblings; #endif - id = get_node_core_id(read_nb_cfg_54()); /* nb_cfg_54 can not be set */ + id = get_node_core_id(read_nb_cfg_54()); /* nb_cfg_54 can not be set */ printk(BIOS_DEBUG, "nodeid = %02d, coreid = %02d\n", id.nodeid, id.coreid); /* Turn on caching if we haven't already */ @@ -85,11 +83,10 @@ static void model_10xxx_init(device_t dev) /* zero the machine check error status registers */ msr.lo = 0; msr.hi = 0; - for(i=0; i < 5; i++) { - wrmsr(MCI_STATUS + (i * 4),msr); + for (i = 0; i < 5; i++) { + wrmsr(MCI_STATUS + (i * 4), msr); } - enable_cache(); /* Enable the local cpu apics */ @@ -107,7 +104,7 @@ static void model_10xxx_init(device_t dev) wrmsr_amd(CPU_ID_FEATURES_MSR, msr); msr = rdmsr_amd(CPU_ID_EXT_FEATURES_MSR); - msr.hi |= 1 << (33-32); + msr.hi |= 1 << (33 - 32); wrmsr_amd(CPU_ID_EXT_FEATURES_MSR, msr); } printk(BIOS_DEBUG, "siblings = %02d, ", siblings); @@ -115,7 +112,7 @@ static void model_10xxx_init(device_t dev) /* DisableCf8ExtCfg */ msr = rdmsr(NB_CFG_MSR); - msr.hi &= ~(1 << (46-32)); + msr.hi &= ~(1 << (46 - 32)); wrmsr(NB_CFG_MSR, msr); /* Write protect SMM space with SMMLOCK. */ @@ -128,6 +125,7 @@ static void model_10xxx_init(device_t dev) static struct device_operations cpu_dev_ops = { .init = model_10xxx_init, }; + static struct cpu_device_id cpu_table[] = { //AMD_GH_SUPPORT { X86_VENDOR_AMD, 0x100f00 }, /* SH-F0 L1 */ @@ -144,7 +142,8 @@ static struct cpu_device_id cpu_table[] = { { X86_VENDOR_AMD, 0x100F80 }, /* HY-D0 */ { 0, 0 }, }; + static const struct cpu_driver model_10xxx __cpu_driver = { - .ops = &cpu_dev_ops, + .ops = &cpu_dev_ops, .id_table = cpu_table, }; |