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authorPatrick Georgi <patrick.georgi@secunet.com>2012-11-20 11:53:47 +0100
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-11-27 23:51:52 +0100
commite135ac5a7ea69b6edcb89345019212f5de412b1e (patch)
tree408611a9f2846867f9731af53b1f08dd32eb6851 /src/cpu/amd/model_10xxx/Kconfig
parentbdc1816b2379bdf569ac6746172bba41e1307917 (diff)
Remove AMD special case for LAPIC based udelay()
- Optionally override FSB clock detection in generic LAPIC code with constant value. - Override on AMD Model fxx, 10xxx, agesa CPUs with 200MHz - compile LAPIC code for romstage, too - Remove #include ".../apic_timer.c" in AMD based mainboards - Remove custom udelay implementation from intel northbridges' romstages Future work: - remove the compile time special case (requires some cpuid based switching) - drop northbridge udelay implementations (i945, i5000) if not required anymore (eg. can SMM use the LAPIC timer?) Change-Id: I25bacaa2163f5e96ab7f3eaf1994ab6899eff054 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/1618 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/amd/model_10xxx/Kconfig')
-rw-r--r--src/cpu/amd/model_10xxx/Kconfig5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig
index 0254cf239c..c5bdb4a5f8 100644
--- a/src/cpu/amd/model_10xxx/Kconfig
+++ b/src/cpu/amd/model_10xxx/Kconfig
@@ -4,6 +4,7 @@ config CPU_AMD_MODEL_10XXX
select SSE2
select MMCONF_SUPPORT_DEFAULT
select TSC_SYNC_LFENCE
+ select UDELAY_LAPIC
if CPU_AMD_MODEL_10XXX
config CPU_ADDR_BITS
@@ -56,6 +57,10 @@ config SET_FIDVID_CORE_RANGE
endif # SET_FIDVID
+config UDELAY_LAPIC_FIXED_FSB
+ int
+ default 200
+
config UPDATE_CPU_MICROCODE
bool
default y