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authorElyes HAOUAS <ehaouas@noos.fr>2017-06-27 22:54:42 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2017-06-28 00:23:32 +0000
commit168ef399c43ad79a40a8bbb2de921a2bd906b3f5 (patch)
tree16613245bebd7920cf3e7ce41f0d7bb5441f05e2 /src/cpu/amd/geode_gx2
parent70083a1de9e12d8dbd3ba70e7a36a7282090f0e0 (diff)
cpu/*: Add whitespace around '<<'
Change-Id: Id46c0b57bd7c9b954b29537c70254df947690e0b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/20397 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/amd/geode_gx2')
-rw-r--r--src/cpu/amd/geode_gx2/cpubug.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/amd/geode_gx2/cpubug.c b/src/cpu/amd/geode_gx2/cpubug.c
index af7ddf349f..cf2b79d8be 100644
--- a/src/cpu/amd/geode_gx2/cpubug.c
+++ b/src/cpu/amd/geode_gx2/cpubug.c
@@ -54,8 +54,8 @@ static void pcideadlock(void)
* for PCI writes to complete.
*/
msr = rdmsr(CPU_DM_CONFIG0);
- msr.hi &= ~(7<<DM_CONFIG0_UPPER_WSREQ_SHIFT);
- msr.hi |= (2<<DM_CONFIG0_UPPER_WSREQ_SHIFT);
+ msr.hi &= ~(7 << DM_CONFIG0_UPPER_WSREQ_SHIFT);
+ msr.hi |= (2 << DM_CONFIG0_UPPER_WSREQ_SHIFT);
msr.lo |= DM_CONFIG0_LOWER_MISSER_SET;
wrmsr(CPU_DM_CONFIG0, msr);
@@ -126,7 +126,7 @@ static void eng1398(void)
msr = rdmsr(MSR_GLCP+0x17);
if ((msr.lo & 0xff) <= CPU_REV_2_0) {
msr = rdmsr(GLCP_SYS_RSTPLL);
- if (msr.lo & (1<<RSTPPL_LOWER_SDRMODE_SHIFT))
+ if (msr.lo & (1 << RSTPPL_LOWER_SDRMODE_SHIFT))
return;
}