diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-09-01 19:44:56 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-09-04 05:33:04 +0200 |
| commit | 2765a893ca355caaf7d859e2bff5eb58630e2ddb (patch) | |
| tree | 80ca397f44651f9bda94ff891746f89b23013ee6 /src/cpu/amd/family_10h-family_15h/tsc_freq.c | |
| parent | d1cab6650261a2e6e75ff85b1868d723f1e1cc79 (diff) | |
src/cpu: Improve code formatting
Change-Id: I17d5efe382da5301a9f5d595186d0fb7576725ca
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16391
Tested-by: build bot (Jenkins)
Reviewed-by: Andrew Wu <arw@dmp.com.tw>
Reviewed-by: Antonello Dettori <dev@dettori.io>
Diffstat (limited to 'src/cpu/amd/family_10h-family_15h/tsc_freq.c')
| -rw-r--r-- | src/cpu/amd/family_10h-family_15h/tsc_freq.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/amd/family_10h-family_15h/tsc_freq.c b/src/cpu/amd/family_10h-family_15h/tsc_freq.c index afd7dab69f..4aea1a02c9 100644 --- a/src/cpu/amd/family_10h-family_15h/tsc_freq.c +++ b/src/cpu/amd/family_10h-family_15h/tsc_freq.c @@ -24,11 +24,11 @@ unsigned long tsc_freq_mhz(void) uint8_t cpudid; /* On Family 10h/15h CPUs the TSC increments - * at the P0 clock rate. Read the P0 clock - * frequency from the P0 MSR and convert - * to MHz. See also the Family 15h BKDG - * Rev. 3.14 page 569. - */ + * at the P0 clock rate. Read the P0 clock + * frequency from the P0 MSR and convert + * to MHz. See also the Family 15h BKDG + * Rev. 3.14 page 569. + */ msr = rdmsr(0xc0010064); cpufid = (msr.lo & 0x3f); cpudid = (msr.lo & 0x1c0) >> 6; |