diff options
| author | Myles Watson <mylesgw@gmail.com> | 2009-10-26 15:14:07 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2009-10-26 15:14:07 +0000 |
| commit | d73c1b5bf1246855a4d4e847702214a3eeb6ab82 (patch) | |
| tree | bd0cbb31eeaad93213abef425135eeaea526a823 /src/cpu/amd/car | |
| parent | 074356ec819be284fb1e8d18a68678b72c5282da (diff) | |
Define some variables that were not defined. There are a couple left.
Do kbuildall then grep not.defined kbuildall.results/*
The interesting ones were GENERATE_* I had to put them in twice to make it work
correctly: once outside the menu setting the defaults, and once inside the menu.
Now they show up when they should, and are always defined
Define HAVE_INIT_TIMER to only exclude the three boards that define it to be 0
in newconfig.
Define MEM_TRAIN_SEQ to be an integer and set it correctly.
Remove CAR_FAM10 and just depend on NORTHBRIDGE_AMD_AMDFAM10
MOVNTI is a performance enhancement, and should default to 0 so it doesn't break
boards that forget to define it.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/car')
| -rw-r--r-- | src/cpu/amd/car/cache_as_ram.inc | 2 | ||||
| -rw-r--r-- | src/cpu/amd/car/post_cache_as_ram.c | 3 |
2 files changed, 1 insertions, 4 deletions
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc index 55209c57e5..fa595f94e5 100644 --- a/src/cpu/amd/car/cache_as_ram.inc +++ b/src/cpu/amd/car/cache_as_ram.inc @@ -24,7 +24,7 @@ /* leave some space for global variable to pass to RAM stage */ #define GlobalVarSize CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE -/* for CONFIG_CAR_FAM10 */ +/* for CAR with FAM10 */ #define CacheSizeAPStack 0x400 /* 1K */ #define MSR_FAM10 0xC001102A diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c index 147a56d618..5b3737123a 100644 --- a/src/cpu/amd/car/post_cache_as_ram.c +++ b/src/cpu/amd/car/post_cache_as_ram.c @@ -103,9 +103,6 @@ static void post_cache_as_ram(void) // dump_mem((CONFIG_RAMTOP) - 0x8000, (CONFIG_RAMTOP) - 0x7c00); -#ifndef CONFIG_MEM_TRAIN_SEQ -#define CONFIG_MEM_TRAIN_SEQ 0 -#endif set_sysinfo_in_ram(1); // So other core0 could start to train mem #if CONFIG_MEM_TRAIN_SEQ == 1 |