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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-06-02 13:47:36 -0500
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-07-07 01:40:43 +0200
commitb5e465522ed9efdc3e3f22db6391adb3fbca6bb1 (patch)
tree859509af6d34b92e88c1bce41db7b81fe62c9c21 /src/cpu/amd/car
parent46b2271ea49d43607cbed273b367f48cf04d844d (diff)
cpu/amd: Detect any conflicts between sysinfo and the stack region
When increasing the number of supported CPUs on AMD Family 10h/15h systems there is a relatively high chance of causing a collision between the CAR global variable region and the AP stack space. Such collision was noted when increasing the number of supported CPUs to 32 on the ASUS KGPE-D16. Detect collision at runtime and print a warning if collision is present. Change-Id: Ib5c32f868b1dfffb3b840bb1b1df5f55b5a25f8d Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/10401 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Diffstat (limited to 'src/cpu/amd/car')
-rw-r--r--src/cpu/amd/car/cache_as_ram.inc3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc
index 769e5cfaa6..1c22447d2c 100644
--- a/src/cpu/amd/car/cache_as_ram.inc
+++ b/src/cpu/amd/car/cache_as_ram.inc
@@ -24,9 +24,10 @@
#define CacheSize CONFIG_DCACHE_RAM_SIZE
#define CacheBase (0xd0000 - CacheSize)
+#define CacheSizeBSPStack CONFIG_DCACHE_BSP_STACK_SIZE
/* For CAR with Fam10h. */
-#define CacheSizeAPStack 0x400 /* 1K */
+#define CacheSizeAPStack CONFIG_DCACHE_AP_STACK_SIZE
#define MSR_MCFG_BASE 0xC0010058
#define MSR_FAM10 0xC001102A