summaryrefslogtreecommitdiff
path: root/src/cpu/amd/car/cache_as_ram.inc
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-15 15:37:30 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-18 08:09:21 +0000
commit184a1176f3de05bd8f09ab16fff91b8b75a5a1c2 (patch)
treec0ad4f138c383d4e8f7daee2b20dd7b7df6693f4 /src/cpu/amd/car/cache_as_ram.inc
parent126d4198a9739f07fe456da27aef10076b955185 (diff)
amdfam10-15: Rename DCACHE_BSP_STACK_SIZE
The original name DCACHE_BSP_STACK_SIZE will be exclusively used to define the fixed size of BSP stack when it is located near the beginning of CAR region. This implementation has the stack located at the very end of CAR region. Remove other fam10-15 exclusive configs from global space. Change-Id: I8b92891be2ed62944a9eddde39ed20a12f4875c0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34880 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu/amd/car/cache_as_ram.inc')
-rw-r--r--src/cpu/amd/car/cache_as_ram.inc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc
index f923a47db4..d923377b89 100644
--- a/src/cpu/amd/car/cache_as_ram.inc
+++ b/src/cpu/amd/car/cache_as_ram.inc
@@ -22,8 +22,8 @@
#define CacheSize CONFIG_DCACHE_RAM_SIZE
#define CacheBase CONFIG_DCACHE_RAM_BASE
-#define CacheSizeBSPStack CONFIG_DCACHE_BSP_STACK_SIZE
-#define CacheSizeBSPSlush CONFIG_DCACHE_BSP_STACK_SLUSH
+#define CacheSizeBSPStack CONFIG_DCACHE_BSP_TOP_STACK_SIZE
+#define CacheSizeBSPSlush CONFIG_DCACHE_BSP_TOP_STACK_SLUSH
/* For CAR with Fam10h. */
#define CacheSizeAPStack CONFIG_DCACHE_AP_STACK_SIZE