diff options
| author | Frank Vibrans <frank.vibrans@amd.com> | 2011-02-14 18:42:12 +0000 |
|---|---|---|
| committer | Marc Jones <marc.jones@amd.com> | 2011-02-14 18:42:12 +0000 |
| commit | 420faca0d0152a70e9855b78e028efe5bd3e3448 (patch) | |
| tree | cd05b1bdaaa7c7c961bb3544892c43ecb70a5b93 /src/cpu/amd/agesa_wrapper/family14/Kconfig | |
| parent | 63e62b03a8385663bebff3bdee88327bb57b27fd (diff) | |
Add AMD cpu wrapper code. Patch 4 of 8.
This code provides cpu early initialization for Family 14h cpus. It is dependent on the AMD Agesa code.
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/agesa_wrapper/family14/Kconfig')
| -rw-r--r-- | src/cpu/amd/agesa_wrapper/family14/Kconfig | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/src/cpu/amd/agesa_wrapper/family14/Kconfig b/src/cpu/amd/agesa_wrapper/family14/Kconfig new file mode 100644 index 0000000000..ce633e00a3 --- /dev/null +++ b/src/cpu/amd/agesa_wrapper/family14/Kconfig @@ -0,0 +1,74 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2011 Advanced Micro Devices, Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +config CPU_AMD_AGESA_WRAPPER_FAMILY14 + bool + select PCI_IO_CFG_EXT + +config CPU_ADDR_BITS + int + default 36 + depends on CPU_AMD_AGESA_WRAPPER_FAMILY14 + +config CPU_SOCKET_TYPE + hex + default 0x10 + depends on CPU_AMD_AGESA_WRAPPER_FAMILY14 + +# DDR2 and REG +config DIMM_SUPPORT + hex + default 0x0104 + depends on CPU_AMD_AGESA_WRAPPER_FAMILY14 + +config EXT_RT_TBL_SUPPORT + bool + default n + depends on CPU_AMD_AGESA_WRAPPER_FAMILY14 + +config EXT_CONF_SUPPORT + bool + default n + depends on CPU_AMD_AGESA_WRAPPER_FAMILY14 + +config CBB + hex + default 0x0 + depends on CPU_AMD_AGESA_WRAPPER_FAMILY14 + +config CDB + hex + default 0x18 + depends on CPU_AMD_AGESA_WRAPPER_FAMILY14 + +config XIP_ROM_BASE + hex + default 0xfff80000 + depends on CPU_AMD_AGESA_WRAPPER_FAMILY14 + +config XIP_ROM_SIZE + hex + default 0x80000 + depends on CPU_AMD_AGESA_WRAPPER_FAMILY14 + +config HAVE_INIT_TIMER + bool + default y + depends on CPU_AMD_AGESA_WRAPPER_FAMILY14 + |