diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-10-25 17:52:49 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-26 20:27:22 +0000 |
| commit | 10796d8c1e446d677c563280f9d7ca1905218041 (patch) | |
| tree | 92773ec6ebfb7dfeb982b11b00a173c7b5644da7 /src/cpu/amd/agesa/family16kb | |
| parent | 761e2ae676e8f7e577dca710b4d574f46c54b203 (diff) | |
src/cpu: drop CPU_X86_CACHE_HELPER and x86_enable_cache wrapper function
Selecting CPU_X86_CACHE_HELPER only added the x86_enable_cache wrapper
function around enable_cache which additionally wrote a POST code to
port 0x80 and printed a message to the console. This function was only
called during multi-processor initialization in ramstage via the init
function pointer in the CPU's device operations struct and was run on
all cores, so the message on the console was printed once per CPU core.
This patch replaces all x86_enable_cache calls by calls to enable_cache
and removes the wrapper function and the Kconfig symbol
CPU_X86_CACHE_HELPER which was used to only add this when the
corresponding CPUs used the x86_enable_cache wrapper function.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Suggested-by: Angel Pons <th3fanbus@gmail.com>
Change-Id: I5866b6bf014821ff9e3a48052a5eaf69319b003a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58579
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/amd/agesa/family16kb')
| -rw-r--r-- | src/cpu/amd/agesa/family16kb/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family16kb/model_16_init.c | 4 |
2 files changed, 2 insertions, 3 deletions
diff --git a/src/cpu/amd/agesa/family16kb/Kconfig b/src/cpu/amd/agesa/family16kb/Kconfig index ee568ece65..e41ddece4d 100644 --- a/src/cpu/amd/agesa/family16kb/Kconfig +++ b/src/cpu/amd/agesa/family16kb/Kconfig @@ -3,7 +3,6 @@ config CPU_AMD_AGESA_FAMILY16_KB bool select X86_AMD_FIXED_MTRRS - select CPU_X86_CACHE_HELPER if CPU_AMD_AGESA_FAMILY16_KB diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c index 9fadc7e3e3..c86f8acdef 100644 --- a/src/cpu/amd/agesa/family16kb/model_16_init.c +++ b/src/cpu/amd/agesa/family16kb/model_16_init.c @@ -23,7 +23,7 @@ static void model_16_init(struct device *dev) u32 siblings; #endif - //x86_enable_cache(); + //enable_cache(); //amd_setup_mtrrs(); //x86_mtrr_check(); disable_cache(); @@ -51,7 +51,7 @@ static void model_16_init(struct device *dev) restore_mtrr(); x86_mtrr_check(); - x86_enable_cache(); + enable_cache(); /* zero the machine check error status registers */ mca_clear_status(); |