diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-01-28 22:35:47 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2018-04-29 17:09:09 +0000 |
| commit | 12d65f80dae1de18b9600a0bce87286312457b61 (patch) | |
| tree | c02883e590a677e50d2e386dbc3edc9eb84117f7 /src/cpu/amd/agesa/family14 | |
| parent | 47d587c837ebe39d6c6e8bf18eaf1401c1126a6e (diff) | |
amd/agesa/family14,15 & 16: Remove unnecessary whitespace
Change-Id: I9495b47a85a6fb9d8d06d9a82c0444b794ec4933
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/23481
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/cpu/amd/agesa/family14')
| -rw-r--r-- | src/cpu/amd/agesa/family14/model_14_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c index a03516daaf..2f7abd89c0 100644 --- a/src/cpu/amd/agesa/family14/model_14_init.c +++ b/src/cpu/amd/agesa/family14/model_14_init.c @@ -42,7 +42,7 @@ static void model_14_init(device_t dev) #endif printk(BIOS_DEBUG, "Model 14 Init.\n"); - disable_cache (); + disable_cache(); /* * AGESA sets the MTRRs main MTRRs. The shadow area needs to be set * by coreboot. The amd_setup_mtrrs should work, but needs debug on fam14. |