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| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-08-07 22:30:04 +0200 |
|---|---|---|
| committer | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-06-06 08:58:30 +0000 |
| commit | b97a303fa69f54e8a880f5c4607d8ee9c9173b16 (patch) | |
| tree | 53d0fc9897f3e08ca04344b5ac60a42955625700 /src/cpu/amd/agesa/Kconfig | |
| parent | 750d57ff5dd7f7412c4526c87191bd1378a49d4a (diff) | |
cpu/amd/agesa: Use common MRC_CACHE code to save S3 data
Use the common code to save data for fast boot or S3 resume.
An notable improvement that comes with this, is that the same 4K page
is not rewritten all the time. This prolongs the hardware's life.
TESTED on pcengines/apu1 and lenovo/g505s: S3 resume works fine.
Change-Id: I0f4f36dcead52a6c550fb5e606772e0a99029872
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44295
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/cpu/amd/agesa/Kconfig')
| -rw-r--r-- | src/cpu/amd/agesa/Kconfig | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index 8c383a5f13..e4f15960e1 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -13,6 +13,7 @@ config CPU_AMD_AGESA select LAPIC_MONOTONIC_TIMER select SPI_FLASH if HAVE_ACPI_RESUME select SSE2 + select CACHE_MRC_SETTINGS if CPU_AMD_AGESA @@ -44,14 +45,6 @@ config ENABLE_MRC_CACHE Try to restore memory training results from non-volatile memory. -config S3_DATA_POS - hex - default 0xFFFF0000 - -config S3_DATA_SIZE - int - default 4096 - endif # CPU_AMD_AGESA source "src/cpu/amd/agesa/family14/Kconfig" |