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| author | Nico Huber <nico.h@gmx.de> | 2024-05-31 17:17:00 +0200 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-11-11 09:16:55 +0000 |
| commit | 003d6397c6237e618e846b655283bdb9c605c518 (patch) | |
| tree | e423a541cc0c5c21ef3a2021373b07629cb13b7f /src/cpu/Makefile.mk | |
| parent | 5b0dc2b6a015288fa22803a5e2dc99c3dbc21c5c (diff) | |
via: Start template for VIA C7 w/ CX700 northbridge
The first steps to bring C7 and CX700 support back mainline. Most is
skeleton copied from the `min86' example.
The romstage entry is placed in the northbridge code, as that's where
we'll perform raminit. Support to read the FSB frequency is added right
away, same for a reset function (using CF9 reset), as both are required
for a minimal build test.
A mainboard VIA EPIA-EX is also introduced for build testing, and in
later stages boot testing as well.
Links:
DS: https://theretroweb.com/chip/documentation/via-cx700-datasheet-feb06-666c8b172d347554179891.pdf
PM: https://web.archive.org/web/20180616220857/http://linux.via.com.tw/support/beginDownload.action?eleid=141&fid=221
Change-Id: I66f678fae0d5a27bb09c0c6c702440900998e574
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82765
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/Makefile.mk')
| -rw-r--r-- | src/cpu/Makefile.mk | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/Makefile.mk b/src/cpu/Makefile.mk index af2402742f..0afe454c1e 100644 --- a/src/cpu/Makefile.mk +++ b/src/cpu/Makefile.mk @@ -6,6 +6,7 @@ subdirs-y += amd subdirs-y += armltd subdirs-y += intel +subdirs-y += via subdirs-$(CONFIG_ARCH_X86) += x86 subdirs-$(CONFIG_CPU_QEMU_X86) += qemu-x86 subdirs-$(CONFIG_CPU_POWER9) += power9 |