soc/intel/xeon_sp: Compress FSP-S

Compress FSP-S to save some space in CBFS.
Reduces the size of debug FSP-S by about 25%.

Test: Still boots on ibm/sbp1.
TEST= Build and boot on intel/archercity CRB.

Change-Id: I6248e7cabbce45f6c2fedfab34f328309f87e868
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81634
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

0 files changed, 0 insertions, 0 deletions