diff options
| author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2018-08-07 14:42:57 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-17 12:28:32 +0000 |
| commit | b6f2e7bd4cdee7e91c3f380a25938f53f6d1c6fd (patch) | |
| tree | 6213e56810b7004ff47a2b02db75b1b2964bf9e2 /src/commonlib/mem_pool.c | |
| parent | bad8fbb22c9e0ebfbb3c291583527b8a30c3bde9 (diff) | |
mb/intel/coffeelake_rvp: Update spd details as per Coffeelake board
Update SPD details to match with Coffeelake U RVP board
BUG=none
BRANCH=none
TEST=Boot on coffelake U rvp board and check if memory training is
passing and board boots till payload.
Change-Id: I953354cf5c6045731262f4f4e9da230187c2d246
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/27906
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/commonlib/mem_pool.c')
0 files changed, 0 insertions, 0 deletions