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| author | Chris Wang <chris.wang@amd.corp-partner.google.com> | 2023-04-26 19:42:50 +0800 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-04-27 14:40:27 +0000 |
| commit | 78790c872c8bae4d0fc2cc4614fa9619c69116cd (patch) | |
| tree | 218231e6279fa480c76c8057fe2c4a118e246d9b /src/commonlib/mem_pool.c | |
| parent | c2059fa72a654f8927f05bcecb4d98ef856c9b64 (diff) | |
vc/amd/fsp/mendocino/FspmUpd: Add UPD to set eDP panel T9 vaule
Add UPD edp_panel_t9_ms for eDP panel sequence adjustment.
BUG=b:271704149
BRANCH=Skyrim
Test=Build/Boot to ChromeOS
Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com>
Change-Id: Idc1a212e9c203584a6497fd6cbd3f995eeb030f2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74788
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/commonlib/mem_pool.c')
0 files changed, 0 insertions, 0 deletions