summaryrefslogtreecommitdiff
path: root/src/commonlib/mem_pool.c
diff options
context:
space:
mode:
authorren kuo <ren.kuo@quantatw.com>2018-03-08 19:10:38 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-06-21 15:46:09 +0000
commit26a4b9d063612dd9ffdd83a15c3035b0677c3a75 (patch)
treea7e191d568270d68defa294494749dea211d23ba /src/commonlib/mem_pool.c
parentbb10ec3d414a4eb7cad652254b6e6bb33b211b53 (diff)
google/lars,lili: Add SPD mapping for Hynix 8GB config
Upstreaming Chromium commit 0bc6c43: Lili: Update Memory IDs TEST=Build and boot up on lili board Original-Change-Id: I6da1e97820b1bf2e751102384eed07236143fe2b Original-Signed-off-by: Ren Kuo <Ren.Kuo@quantatw.com> Original-Reviewed-on: https://chromium-review.googlesource.com/956782 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Change-Id: Icf6588582da3b4a7861bced539d51a914b011dc4 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/27135 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/commonlib/mem_pool.c')
0 files changed, 0 insertions, 0 deletions