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author | Elyes HAOUAS <ehaouas@noos.fr> | 2017-11-23 21:23:44 +0100 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2017-11-30 17:21:17 +0000 |
commit | 242ea84b017b7f2812a4a1ba4b4996e5f1bb35ab (patch) | |
tree | bd104e859220d84d30f56c3acb689ff7e0ca17b9 /src/commonlib/mem_pool.c | |
parent | 3df9dbe8864adf6d41df2fe617c8818d1bad9d42 (diff) |
intel: Replace msr(0x198) with msr(IA32_PERF_STATUS)
Change-Id: I22241427d1405de2e2eb2b3cfb029f3ce2c8dace
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/22585
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/commonlib/mem_pool.c')
0 files changed, 0 insertions, 0 deletions