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authorPatrick Rudolph <patrick.rudolph@9elements.com>2024-03-17 11:12:12 +0100
committerPatrick Rudolph <patrick.rudolph@9elements.com>2024-03-19 10:59:08 +0000
commitbb50190bec998b4ec1a6cf4e02f1ae4022b36084 (patch)
tree1b03da5d0609a165aaea1f8fd4418f76d4b3c7ce /src/commonlib/bsd
parent43d260745a13dfefb2b03a6edbe9c109ab7ad2ee (diff)
soc/intel/xeon_sp: Drop RMRR entry for USB
Drop RMRR entry for XHCI controller since it's not under BIOS control. There's no USB-PS/2 emulation done in SMM, hence it's not needed. TEST=intel/archercity CRB Change-Id: I5afd68371d71a00988fe0f8a6045ec5ce2adc6a1 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81297 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Diffstat (limited to 'src/commonlib/bsd')
-rw-r--r--src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h b/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h
index 615b8c63f3..b88a0831b9 100644
--- a/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h
+++ b/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h
@@ -61,7 +61,7 @@
#define CBMEM_ID_STAGEx_META 0x57a9e000
#define CBMEM_ID_STAGEx_CACHE 0x57a9e100
#define CBMEM_ID_STAGEx_RAW 0x57a9e200
-#define CBMEM_ID_STORAGE_DATA 0x53746f72
+#define CBMEM_ID_STORAGE_DATA 0x53746f72 /* deprecated */
#define CBMEM_ID_TPM_CB_LOG 0x54435041 /* TPM log in coreboot-specific format */
#define CBMEM_ID_TCPA_TCG_LOG 0x54445041 /* TPM log per TPM 1.2 specification */
#define CBMEM_ID_TIMESTAMP 0x54494d45