diff options
| author | Martin Roth <martin@coreboot.org> | 2020-07-23 19:01:29 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-07-27 21:00:44 +0000 |
| commit | fc8da0010b45d920d666ad7f0310898a0b13a621 (patch) | |
| tree | 6971128f858b7e2c5b1956d2ad7845ca280a2604 /src/arch | |
| parent | 44d5347ed17237e9df8f57557ca2709e9efae29a (diff) | |
arch/arm/armv7: Make null dcache_apply_all macro for userspace
Make an empty macro for dcache_apply_all for code running in userspace
so that we don't hang the system.
BUG=b:161554141
TEST=Run board through a bunch of recovery cycles.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I3dc0f40dfe4d4a699528068154eee2d3c23d3d74
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43787
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/arm/armv7/cpu.S | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/arch/arm/armv7/cpu.S b/src/arch/arm/armv7/cpu.S index 610659243d..c53119c8d1 100644 --- a/src/arch/arm/armv7/cpu.S +++ b/src/arch/arm/armv7/cpu.S @@ -23,6 +23,19 @@ * THIS FUNCTION MUST PRESERVE THE VALUE OF r10 */ +#if ENV_USER_SPACE +/* + * Empty macro for code running in userspace. Trying to manipulate the + * cache from userspace hangs the system. To run code at a privileged level, + * the userspace code needs to execute an API call to the privileged mode + * code. + */ +.macro dcache_apply_all crm + bx lr +.endm + +#else + .macro dcache_apply_all crm dsb mov r3, #-2 @ initialize level so that we start at 0 @@ -82,6 +95,8 @@ bx lr .endm +#endif /* ENV_USER_SPACE */ + /* * Bring an ARM processor we just gained control of (e.g. from IROM) into a * known state regarding caches/SCTLR. Completely cleans and invalidates |