build rules: Identify build stage with simple variables

Provide simple environment variables telling which stage of boot is
being built. Also move this to arch-agnostic location.

Change-Id: I8cbb5cf91f53e01c06e7d672b5be3f5c235f911d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5410
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)

5 files changed, 4 insertions, 72 deletions

diff --git a/src/arch/armv7/include/arch/rules.h b/src/arch/armv7/include/arch/rules.h
deleted file mode 100644
index a790365118..0000000000
--- a/src/arch/armv7/include/arch/rules.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _ARCH_RULES_H
-#define _ARCH_RULES_H
-
-/* For romstage and ramstage always build with simple device model, ie.
- * PCI, PNP and CPU functions operate without use of devicetree.
- *
- * For ramstage individual source file may define __SIMPLE_DEVICE__
- * before including any header files to force that particular source
- * be built with simple device model.
- */
-
-#if defined(__PRE_RAM__)
-#define __SIMPLE_DEVICE__
-#endif
-
-#endif /* _ARCH_RULES_H */
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 56f0c5c7ba..f986c3b092 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -368,9 +368,9 @@ endif
 bootblock_inc += $(objgenerated)/bootblock.inc
 bootblock_inc += $(src)/arch/x86/lib/walkcbfs.S
 
-bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__
+bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__ -D__BOOT_BLOCK__
 ifeq ($(CONFIG_SSE),y)
-bootblock_romccflags := -mcpu=k7 -msse -O2 -D__PRE_RAM__
+bootblock_romccflags := -mcpu=k7 -msse -O2 -D__PRE_RAM__ -D__BOOT_BLOCK__
 endif
 
 $(objgenerated)/bootblock.ld: $$(bootblock_lds) $(obj)/ldoptions
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 281565bef6..ebb7cdfdfb 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -2,7 +2,7 @@
 #define ARCH_CPU_H
 
 #include <stdint.h>
-#include <arch/rules.h>
+#include <rules.h>
 
 /*
  * EFLAGS bits
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index b10fb8a7cf..ce3574ea70 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -2,7 +2,7 @@
 #define _ASM_IO_H
 
 #include <stdint.h>
-#include <arch/rules.h>
+#include <rules.h>
 
 /*
  * This file contains the definitions for the x86 IO instructions
diff --git a/src/arch/x86/include/arch/rules.h b/src/arch/x86/include/arch/rules.h
deleted file mode 100644
index 4b8467730d..0000000000
--- a/src/arch/x86/include/arch/rules.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _ARCH_RULES_H
-#define _ARCH_RULES_H
-
-/* For romstage and ramstage always build with simple device model, ie.
- * PCI, PNP and CPU functions operate without use of devicetree.
- *
- * For ramstage individual source file may define __SIMPLE_DEVICE__
- * before including any header files to force that particular source
- * be built with simple device model.
- */
-
-#if defined(__PRE_RAM__) || defined(__SMM__)
-#define __SIMPLE_DEVICE__
-#endif
-
-#endif /* _ARCH_RULES_H */