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authorAaron Durbin <adurbin@chromium.org>2015-05-08 15:47:00 -0500
committerAaron Durbin <adurbin@chromium.org>2015-05-11 18:35:57 +0200
commit52a530d03261a94f46b98ca29d20c9e5e686deaa (patch)
treed3e2c27cae09819dbef2ee4bc1c6b02f7e2e1495 /src/arch
parenta9ee61e2538c206c3518f4ede1da6405ad7b1476 (diff)
arm: update verstage linking
The linker scripts are added to stage objs so remove those from the object lists. boot.c will be needed to link verstage properly. Lastly, VERSTAGE_LIB has no value so remove it. Change-Id: Ie53b42c4995a96006463ec5b358aa43a731cb1b8 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10149 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/arm/Makefile.inc7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/arch/arm/Makefile.inc b/src/arch/arm/Makefile.inc
index c05b33e576..0fd4fed268 100644
--- a/src/arch/arm/Makefile.inc
+++ b/src/arch/arm/Makefile.inc
@@ -61,7 +61,7 @@ bootblock-y += memmove.S
bootblock-y += div0.c
bootblock-y += clock.c
-$(objcbfs)/bootblock.debug: $$(bootblock-objs) $$(VERSTAGE_LIB)
+$(objcbfs)/bootblock.debug: $$(bootblock-objs)
@printf " LINK $(subst $(obj)/,,$(@))\n"
$(LD_bootblock) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.bootblock.ld --start-group $(filter-out %.ld,$(bootblock-objs)) --end-group
@@ -73,10 +73,11 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARM
ifeq ($(CONFIG_ARCH_VERSTAGE_ARM),y)
-$(objcbfs)/verstage.debug: $(objgenerated)/libverstage.a $$(verstage-objs) $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld
+$(objcbfs)/verstage.debug: $(objgenerated)/libverstage.a $$(verstage-objs)
@printf " LINK $(subst $(obj)/,,$(@))\n"
- $(LD_verstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld --start-group $(objgenerated)/libverstage.a $$(verstage-objs) --end-group
+ $(LD_verstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld --start-group $(filter-out %.ld,$(verstage-objs)) $(objgenerated)/libverstage.a --end-group
+verstage-y += boot.c
verstage-y += div0.c
verstage-y += eabi_compat.c
verstage-y += memset.S