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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-11-10 10:13:54 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-03 09:04:12 +0000 |
| commit | 242da79a3f10988e50654b2daa2fdd14acacaa9f (patch) | |
| tree | dddefa0833cb1b9f47f01082de6b97df6d863eaf /src/arch | |
| parent | d828aed1ddc46404828597e39d366466efa485b1 (diff) | |
soc/intel/alderlake: Log internal device wake events
Add wake events to the elog for: HDA, GbE, SATA, CSE, south XHCI,
south XDCI, CNVi WiFI, TCSS XHCI, TCSS XDCI, and TCSS DMA ports.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Icd50dc7ee052cf13b703188c0fd3d8b99216cb4a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47399
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/arch')
0 files changed, 0 insertions, 0 deletions