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authorLee Leahy <leroy.p.leahy@intel.com>2016-06-07 08:45:17 -0700
committerLeroy P Leahy <leroy.p.leahy@intel.com>2016-06-11 19:14:55 +0200
commitfdc8c8b5fa88494ee5f62572830de10d4187dcce (patch)
tree29aa8798b1fae3a96a7a09b916b896eaf8cf0e65 /src/arch/x86
parent3790a420036874f3d8e01f4f4cf1340f657242d2 (diff)
arch/x86: Add debug spinloop
Conditionally add a debug spinloop to enable easy connection of JTAG debuggers. TEST=Build and run on Galileo Gen2 with a JTAG debugger. Change-Id: I7a21f9e6bfb10912d06ce48447c61202553630d0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15127 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/Kconfig7
-rw-r--r--src/arch/x86/bootblock_crt0.S9
2 files changed, 16 insertions, 0 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 724c4dba61..8609e20136 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -117,6 +117,13 @@ config PC80_SYSTEM
bool
default y if ARCH_X86
+config BOOTBLOCK_DEBUG_SPINLOOP
+ bool
+ default n
+ help
+ Add a spin (JMP .) in bootblock_crt0.S during early bootblock to wait
+ for a JTAG debugger to break into the execution sequence.
+
config BOOTBLOCK_MAINBOARD_INIT
string
diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S
index 9fbce5dbb5..8ae82b4368 100644
--- a/src/arch/x86/bootblock_crt0.S
+++ b/src/arch/x86/bootblock_crt0.S
@@ -32,6 +32,15 @@
#include <cpu/x86/16bit/reset16.inc>
#include <cpu/x86/32bit/entry32.inc>
+#if IS_ENABLED(CONFIG_BOOTBLOCK_DEBUG_SPINLOOP)
+
+ /* Wait for a JTAG debugger to break in and set EBX non-zero */
+ xor %ebx, %ebx
+
+debug_spinloop:
+ cmp $0, %ebx
+ jz debug_spinloop
+#endif
bootblock_protected_mode_entry:
/* Save BIST result */