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authorRaul E Rangel <rrangel@chromium.org>2021-06-24 16:54:27 -0600
committerRaul Rangel <rrangel@chromium.org>2021-07-02 23:11:16 +0000
commite92a9825587ac1c4c6133603354f711344e742dd (patch)
tree43c170c52db27e53fc04e425d88e8aef763922bf /src/arch/x86
parente19d0efb5e4f9d3a9c0053df8b86c31da3d47ae7 (diff)
arch/x86: Add X86_CUSTOM_BOOTMEDIA
In order to disable X86_TOP4G_BOOTMEDIA_MAP it requires the definition to be overridden. This makes it a little less ergonomic to use. Instead introduce the inverse option that can be selected. I chose to leave X86_TOP4G_BOOTMEDIA_MAP since it keeps the Makefiles simple. BUG=b:179699789 TEST=none Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I65bbc118bde88687a7d7749c87acf1cbdc56a269 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55853 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/Kconfig10
1 files changed, 7 insertions, 3 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index ef07a2a03a..6af3fa8b69 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -137,11 +137,15 @@ config RAMTOP
# Traditionally BIOS region on SPI flash boot media was memory mapped right below
# 4G and it was the last region in the IFD. This way translation between CPU
# address space to flash address was trivial. However some IFDs on newer SoCs
-# have BIOS region sandwiched between descriptor and other regions. Turning off
-# this option enables soc code to provide custom mmap_boot.c which can be used to
-# implement complex translation.
+# have BIOS region sandwiched between descriptor and other regions. Turning on
+# X86_CUSTOM_BOOTMEDIA disables X86_TOP4G_BOOTMEDIA_MAP which allows the
+# soc code to provide custom mmap_boot.c.
+config X86_CUSTOM_BOOTMEDIA
+ bool
+
config X86_TOP4G_BOOTMEDIA_MAP
bool
+ depends on !X86_CUSTOM_BOOTMEDIA
default y
# This is something you almost certainly don't want to mess with.