diff options
| author | Stefan Reinauer <stepan@coreboot.org> | 2010-12-11 20:33:41 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-12-11 20:33:41 +0000 |
| commit | 8677a23d5b053d550f70246de9c7dc8fd4e2fbf9 (patch) | |
| tree | d9a7c6042de85d623739e2679ba90c66aad2797f /src/arch/x86/llshell/readme.coreboot | |
| parent | 198cb96387c457affa01696405ffaa4531e8e361 (diff) | |
After this has been brought up many times before, rename src/arch/i386 to
src/arch/x86.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/x86/llshell/readme.coreboot')
| -rw-r--r-- | src/arch/x86/llshell/readme.coreboot | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/arch/x86/llshell/readme.coreboot b/src/arch/x86/llshell/readme.coreboot new file mode 100644 index 0000000000..ae7dcbecd0 --- /dev/null +++ b/src/arch/x86/llshell/readme.coreboot @@ -0,0 +1,25 @@ + +1) Include llshell.inc in your northbridge Config file +2) In raminit.inc (or whatever), make a jmp out to low_level_shell, setting + a return label in %esp. +For example: +ram_set_registers: + + mov $llshell_ret1,%esp + jmp low_level_shell +llshell_ret1: + + /* Disable and invalidate the cache */ + invd + mov %cr0, %eax + .... +3) Optionally, comment out two lines in ramtest.inc: +5: + CONSOLE_INFO_TX_STRING($rt_toomany) + // post_code(0xf1) + // jmp .Lhlt +otherwise, a ramtest failure will hang + +4) build and flash as normal +If it worked, the speaker will beep, and you'll get a shell. +Type help or ? at the prompt for a list of commands. |