summaryrefslogtreecommitdiff
path: root/src/arch/x86/failover.ld
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-29 00:52:01 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-30 06:01:25 +0000
commit9b71804e4fda9bcb067bb06f7d5d5c3f76922327 (patch)
tree363f70bf4a2c7a41f75b097799a3d2a536a77a0e /src/arch/x86/failover.ld
parentdc34a9d6de6ab21a1f1ed1a6cba142585c092045 (diff)
AGESA,binaryPI: Remove BIST reporting in romstage
For easier C environment bootblock transition by using already existing prototypes, BIST will not be passed to romstage. It is expected that bootblock will have equivalent code. Change-Id: I0f8e3657ac79277cd77c397d1b3e931e33a6f5db Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37348 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/x86/failover.ld')
0 files changed, 0 insertions, 0 deletions