diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2018-04-21 14:45:32 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2018-04-24 14:37:59 +0000 |
| commit | 6403167d290da235a732bd2d6157aa2124fb403a (patch) | |
| tree | 9c4805af37a31830934f91098d299e967df930c6 /src/arch/x86/cbmem.c | |
| parent | 38fd6685e9da61daadc96a8d537e6966dfe3b219 (diff) | |
compiler.h: add __weak macro
Instead of writing out '__attribute__((weak))' use a shorter form.
Change-Id: If418a1d55052780077febd2d8f2089021f414b91
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25767
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'src/arch/x86/cbmem.c')
| -rw-r--r-- | src/arch/x86/cbmem.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/arch/x86/cbmem.c b/src/arch/x86/cbmem.c index 6a353bd324..ef53553777 100644 --- a/src/arch/x86/cbmem.c +++ b/src/arch/x86/cbmem.c @@ -14,17 +14,18 @@ #include <stdlib.h> #include <console/console.h> #include <cbmem.h> +#include <compiler.h> #include <arch/acpi.h> #if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) -void __attribute__((weak)) backup_top_of_low_cacheable(uintptr_t ramtop) +void __weak backup_top_of_low_cacheable(uintptr_t ramtop) { /* Do nothing. Chipset may have implementation to save ramtop in NVRAM. */ } -uintptr_t __attribute__((weak)) restore_top_of_low_cacheable(void) +uintptr_t __weak restore_top_of_low_cacheable(void) { return 0; } @@ -43,7 +44,7 @@ void set_late_cbmem_top(uintptr_t ramtop) } /* Top of CBMEM is at highest usable DRAM address below 4GiB. */ -uintptr_t __attribute__((weak)) restore_cbmem_top(void) +uintptr_t __weak restore_cbmem_top(void) { if (IS_ENABLED(CONFIG_LATE_CBMEM_INIT) && ENV_ROMSTAGE) if (!acpi_is_wakeup_s3()) |