diff options
| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-06-08 19:35:06 -0500 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2015-11-11 18:45:14 +0100 |
| commit | 83abd81c8acb3a53dfc125e248d9e5fd58f3e0f7 (patch) | |
| tree | ca0652a1421652f4eb8b4af358f66e2fc256e1db /src/arch/x86/acpigen.c | |
| parent | dd4390b6e055ef862084a5fc45b756d6fe09151d (diff) | |
cpu/amd: Add CC6 support
This patch adds CC6 power save support to the AMD Family 15h
support code. As CC6 is a complex power saving state that
relies heavily on CPU, northbridge, and southbridge cooperation,
this patch alters significant amounts of code throughout the
tree simultaneously.
Allowing the CPU to enter CC6 allows the second level of turbo
boost to be reached, and also provides significant power savings
when the system is idle due to the complete core shutdown.
Change-Id: I44ce157cda97fb85f3e8f3d7262d4712b5410670
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11979
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/x86/acpigen.c')
| -rw-r--r-- | src/arch/x86/acpigen.c | 26 |
1 files changed, 22 insertions, 4 deletions
diff --git a/src/arch/x86/acpigen.c b/src/arch/x86/acpigen.c index cac2f8c9bb..c1a09f261d 100644 --- a/src/arch/x86/acpigen.c +++ b/src/arch/x86/acpigen.c @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering * Copyright (C) 2009 Rudolf Marek <r.marek@assembler.cz> * * This program is free software; you can redistribute it and/or modify @@ -17,11 +18,11 @@ #define ACPIGEN_LENSTACK_SIZE 10 /* - * If you need to change this, change acpigen_write_f and + * If you need to change this, change acpigen_write_len_f and * acpigen_pop_len */ -#define ACPIGEN_MAXLEN 0xfff +#define ACPIGEN_MAXLEN 0xfffff #include <string.h> #include <arch/acpigen.h> @@ -39,6 +40,7 @@ void acpigen_write_len_f(void) len_stack[ltop++] = gencurrent; acpigen_emit_byte(0); acpigen_emit_byte(0); + acpigen_emit_byte(0); } void acpigen_pop_len(void) @@ -48,9 +50,10 @@ void acpigen_pop_len(void) char *p = len_stack[--ltop]; len = gencurrent - p; ASSERT(len <= ACPIGEN_MAXLEN) - /* generate store length for 0xfff max */ - p[0] = (0x40 | (len & 0xf)); + /* generate store length for 0xfffff max */ + p[0] = (0x80 | (len & 0xf)); p[1] = (len >> 4 & 0xff); + p[2] = (len >> 12 & 0xff); } @@ -479,6 +482,21 @@ void acpigen_write_CST_package(acpi_cstate_t *cstate, int nentries) acpigen_pop_len(); } +void acpigen_write_CSD_package(u32 domain, u32 numprocs, CSD_coord coordtype, u32 index) +{ + acpigen_write_name("_CSD"); + acpigen_write_package(1); + acpigen_write_package(6); + acpigen_write_byte(6); // 6 values + acpigen_write_byte(0); // revision 0 + acpigen_write_dword(domain); + acpigen_write_dword(coordtype); + acpigen_write_dword(numprocs); + acpigen_write_dword(index); + acpigen_pop_len(); + acpigen_pop_len(); +} + void acpigen_write_TSS_package(int entries, acpi_tstate_t *tstate_list) { /* |