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| author | Huayang Duan <huayang.duan@mediatek.com> | 2020-06-30 10:22:39 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-01-19 01:30:55 +0000 |
| commit | c37b9aa9f013882d2a2e86ec21f8c0364af9e09e (patch) | |
| tree | 8484569c24bfccf52b82f1535e43d095e2785e53 /src/arch/riscv | |
| parent | 58ba83fe74238cc79d858411bdc3e3ba2e842b12 (diff) | |
soc/mediatek/mt8192: Get DDR base information after calibration
After calibration, we can get ddr vendor id or density info from
MR5 or MR8, this helps to make sure the DDR HW is as we expected.
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Change-Id: Ie62948368716d309aab8149372b2b6093fc33552
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44712
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/arch/riscv')
0 files changed, 0 insertions, 0 deletions