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| author | Kevin Chiu <Kevin.Chiu@quantatw.com> | 2020-11-23 13:01:35 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-01-15 22:38:14 +0000 |
| commit | 3379879c6c7d15e05f7b43adb25c13111cfced70 (patch) | |
| tree | 47ecb67ef6a31a51d0cf4648151a22a0b4e86eeb /src/arch/riscv/smp.c | |
| parent | bc148df898038b9ce2012ba7e90e7f9fb3707b28 (diff) | |
mb/google/zork: update USB 2.0 controller Lane Parameter for dirinboz
Enhance USB 2.0 M/B C0, DB C1 A1 port:
HS DC Voltage Level(TXVREFTUNE0): 0xe
COMPDISTUNE(COMPDISTUNE0): 0x7
BUG=b:165209698
BRANCH=zork
TEST=emerge-zork coreboot
Change-Id: I371e4295c2ee161096f0a277c0c649bf217269b2
Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47857
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/arch/riscv/smp.c')
0 files changed, 0 insertions, 0 deletions