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authorXiang Wang <wxjstz@126.com>2018-07-19 17:35:39 +0800
committerron minnich <rminnich@gmail.com>2019-02-02 16:53:21 +0000
commit820dcfceb3901dbb00bb90c876e374126ca14e20 (patch)
tree2f0ba3f1038291f9dda7755680551cbe425f7922 /src/arch/riscv/payload.c
parentc47d43a8af5dfdbdb7afebb39f999f18f36c9d23 (diff)
riscv: Simplify payload handling
1. Simplify payload code and convert it to C 2. Save the FDT pointer to HLS (hart-local storage). 3. Don't use mscratch to pass FDT pointer as it is used for exception handling. Change-Id: I32bf2a99e07a65358a7f19b899259f0816eb45e8 Signed-off-by: Xiang Wang <wxjstz@126.com> Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/c/31179 Reviewed-by: ron minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv/payload.c')
-rw-r--r--src/arch/riscv/payload.c51
1 files changed, 51 insertions, 0 deletions
diff --git a/src/arch/riscv/payload.c b/src/arch/riscv/payload.c
new file mode 100644
index 0000000000..8a07ff879f
--- /dev/null
+++ b/src/arch/riscv/payload.c
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc
+ * Copyright (C) 2018 HardenedLinux
+ * Copyright (C) 2018 Jonathan Neuschäfer
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <arch/boot.h>
+#include <arch/encoding.h>
+#include <console/console.h>
+
+void run_payload(struct prog *prog, void *fdt, int payload_mode)
+{
+ void (*doit)(int hart_id, void *fdt) = prog_entry(prog);
+ int hart_id = read_csr(mhartid);
+ uintptr_t status = read_csr(mstatus);
+ status &= ~MSTATUS_MPIE;
+ status &= ~MSTATUS_MPP;
+ switch (payload_mode) {
+ case RISCV_PAYLOAD_MODE_U:
+ break;
+ case RISCV_PAYLOAD_MODE_S:
+ status |= MSTATUS_SPP;
+ break;
+ case RISCV_PAYLOAD_MODE_M:
+ doit(hart_id, fdt);
+ return;
+ default:
+ die("wrong privilege level for payload");
+ break;
+ }
+ write_csr(mstatus, status);
+ write_csr(mepc, doit);
+ asm volatile(
+ "mv a0, %0\n\t"
+ "mv a1, %0\n\t"
+ "mret" ::"r"(hart_id),
+ "r"(fdt)
+ : "a0", "a1");
+}