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authorXiang Wang <wxjstz@126.com>2018-10-11 17:30:37 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-11-05 09:03:40 +0000
commit7c9540ea1d46a776ec92b58f99074f51b430f9bb (patch)
treedc9b3d25062791f40edd72ddcccaa3dd0171b85c /src/arch/riscv/include
parentc85f9c589726caba41970d5fbdadd8a147dd7956 (diff)
riscv: add support smp_pause / smp_resume
See https://doc.coreboot.org/arch/riscv/ we know that we need to execute smp_pause at the start of each stage and smp_resume at the end of each stage. Change-Id: I6f8159637bfb15f54f0abeb335de2ba6e9cf82fb Signed-off-by: Xiang Wang <wxjstz@126.com> Reviewed-on: https://review.coreboot.org/29023 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Philipp Hug <philipp@hug.cx>
Diffstat (limited to 'src/arch/riscv/include')
-rw-r--r--src/arch/riscv/include/arch/smp/smp.h33
-rw-r--r--src/arch/riscv/include/mcall.h18
2 files changed, 50 insertions, 1 deletions
diff --git a/src/arch/riscv/include/arch/smp/smp.h b/src/arch/riscv/include/arch/smp/smp.h
new file mode 100644
index 0000000000..e996404476
--- /dev/null
+++ b/src/arch/riscv/include/arch/smp/smp.h
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 HardenedLinux.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _RISCV_SMP_H
+#define _RISCV_SMP_H
+
+/*
+ * This function is used to pause smp. Only the hart with hartid equal
+ * to working_hartid can be returned from smp_pause, other harts will
+ * enter halt and wait for wakeup
+ */
+void smp_pause(int working_hartid);
+
+/*
+ * This function is used to wake up the harts that are halted by the
+ * smp_pause function. And this function will not return, all hart will
+ * jump to fn execution, and arg is the argument of the function fn.
+ */
+void smp_resume(void (*fn)(void *), void *arg);
+
+#endif
diff --git a/src/arch/riscv/include/mcall.h b/src/arch/riscv/include/mcall.h
index d1e414a42f..29df736d1b 100644
--- a/src/arch/riscv/include/mcall.h
+++ b/src/arch/riscv/include/mcall.h
@@ -18,7 +18,7 @@
// NOTE: this is the size of hls_t below. A static_assert would be
// nice to have.
-#define HLS_SIZE 64
+#define HLS_SIZE 88
/* We save 37 registers, currently. */
#define MENTRY_FRAME_SIZE (HLS_SIZE + 37 * 8)
@@ -35,6 +35,12 @@ typedef struct {
unsigned long sbi_private_data;
} sbi_device_message;
+struct blocker {
+ void *arg;
+ void (*fn)(void *arg);
+ uint32_t sync_a;
+ uint32_t sync_b;
+};
typedef struct {
sbi_device_message *device_request_queue_head;
@@ -46,6 +52,7 @@ typedef struct {
int ipi_pending;
uint64_t *timecmp;
uint64_t *time;
+ struct blocker entry;
} hls_t;
#define MACHINE_STACK_TOP() ({ \
@@ -64,6 +71,15 @@ void hls_init(uint32_t hart_id); // need to call this before launching linux
/* This function is used to initialize HLS()->time/HLS()->timecmp */
void mtime_init(void);
+/*
+ * This function needs be implement by SoC code.
+ * Although the privileged instruction set defines that MSIP will be
+ * memory-mapped, but does not define how to map. SoC can be implemented as
+ * a bit, a byte, a word, and so on.
+ * So we can't provide code that is related to implementation.
+ */
+void set_msip(int hartid, int val);
+
#endif // __ASSEMBLER__
#endif