Drop remainder of PPC port

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4884 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 0 insertions, 293 deletions

diff --git a/src/arch/ppc/include/ppc_asm.tmpl b/src/arch/ppc/include/ppc_asm.tmpl
deleted file mode 100644
index ec4858da81..0000000000
--- a/src/arch/ppc/include/ppc_asm.tmpl
+++ /dev/null
@@ -1,293 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-/*
- * This file contains all the macros and symbols which define
- * a PowerPC assembly language environment.
- */
-#ifndef	__PPC_ASM_TMPL__
-#define __PPC_ASM_TMPL__
-
-/***************************************************************************
- *
- * These definitions simplify the ugly declarations necessary for GOT
- * definitions.
- *
- * Stolen from prepboot/bootldr.h, (C) 1998 Gabriel Paubert, paubert@iram.es
- *
- * Uses r14 to access the GOT
- */
-
-#define START_GOT			\
-	.section	".got2","aw";	\
-.LCTOC1 = .+32768
-
-#define END_GOT				\
-	.text
-
-#define GET_GOT				\
-	bl	1f		;	\
-	.text	2		;	\
-0:	.long	.LCTOC1-1f	;	\
-	.text			;	\
-1:	mflr	r14		;	\
-	lwz	r0,0b-1b(r14)	;	\
-	add	r14,r0,r14	;
-
-#define GOT_ENTRY(NAME)		.L_ ## NAME = . - .LCTOC1 ; .long NAME
-
-#define GOT(NAME)		.L_ ## NAME (r14)
-
-
-/***************************************************************************
- * Register names
- */
-#define	r0	0
-#define	r1	1
-#define	r2	2
-#define	r3	3
-#define	r4	4
-#define	r5	5
-#define	r6	6
-#define	r7	7
-#define	r8	8
-#define	r9	9
-#define	r10	10
-#define	r11	11
-#define	r12	12
-#define	r13	13
-#define	r14	14
-#define	r15	15
-#define	r16	16
-#define	r17	17
-#define	r18	18
-#define	r19	19
-#define	r20	20
-#define	r21	21
-#define	r22	22
-#define	r23	23
-#define	r24	24
-#define	r25	25
-#define	r26	26
-#define	r27	27
-#define	r28	28
-#define	r29	29
-#define	r30	30
-#define	r31	31
-
-/*
- * FP register names
- */
-#define	fr0	0
-#define	fr1	1
-#define	fr2	2
-#define	fr3	3
-#define	fr4	4
-#define	fr5	5
-#define	fr6	6
-#define	fr7	7
-#define	fr8	8
-#define	fr9	9
-#define	fr10	10
-#define	fr11	11
-#define	fr12	12
-#define	fr13	13
-#define	fr14	14
-#define	fr15	15
-#define	fr16	16
-#define	fr17	17
-#define	fr18	18
-#define	fr19	19
-#define	fr20	20
-#define	fr21	21
-#define	fr22	22
-#define	fr23	23
-#define	fr24	24
-#define	fr25	25
-#define	fr26	26
-#define	fr27	27
-#define	fr28	28
-#define	fr29	29
-#define	fr30	30
-#define	fr31	31
-
-/* Some special registers */
-
-#define	TBRU	269	/* Time base Upper/Lower (Reading) */
-#define	TBRL	268
-#define TBWU	284	/* Time base Upper/Lower (Writing) */
-#define TBWL	285
-#define	XER	1
-#define LR	8
-#define CTR	9
-#define HID0	1008	/* Hardware Implementation */
-#define PVR	287	/* Processor Version */
-#define SDR1	25	/* MMU hash base register */
-#define DAR	19	/* Data Address Register */
-#define SPR0	272	/* Supervisor Private Registers */
-#define SPRG0   272
-#define SPR1	273
-#define SPRG1   273
-#define SPR2	274
-#define SPRG2   274
-#define SPR3	275
-#define SPRG3   275
-#define DSISR	18
-#define SRR0	26	/* Saved Registers (exception) */
-#define SRR1	27
-#define DEC	22	/* Decrementer */
-#define EAR	282	/* External Address Register */
-#define ICR	148	/* Interrupt Cause Register (37-44) */
-#define DER	149
-#define COUNTA	150	/* Breakpoint Counter	    (37-44) */
-#define COUNTB	151	/* Breakpoint Counter	    (37-44) */
-#define LCTRL1	156	/* Load/Store Support	    (37-40) */
-#define LCTRL2	157	/* Load/Store Support	    (37-41) */
-#define ICTRL	158
-
-/* Registers in the processor's internal memory map that we use.
-*/
-#define IMMR	0xff000000
-
-#define SYPCR	0x00000004
-#define BR0	0x00000100
-#define OR0	0x00000104
-#define BR1	0x00000108
-#define OR1	0x0000010c
-#define BR2	0x00000110
-#define OR2	0x00000114
-#define BR3	0x00000118
-#define OR3	0x0000011c
-#define BR4	0x00000120
-#define OR4	0x00000124
-
-#define MAR	0x00000164
-#define MCR	0x00000168
-#define MAMR	0x00000170
-#define MBMR	0x00000174
-#define MSTAT	0x00000178
-#define MPTPR	0x0000017a
-#define MDR	0x0000017c
-
-#define TBSCR	0x00000200
-#define TBREFF0	0x00000204
-
-#define PLPRCR	0x00000284
-
-#define curptr r2
-
-#define SYNC \
-	sync; \
-	isync
-
-/*
- * Macros for storing registers into and loading registers from
- * exception frames.
- */
-#define SAVE_GPR(n, base)	stw	n,GPR0+4*(n)(base)
-#define SAVE_2GPRS(n, base)	SAVE_GPR(n, base); SAVE_GPR(n+1, base)
-#define SAVE_4GPRS(n, base)	SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
-#define SAVE_8GPRS(n, base)	SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
-#define SAVE_10GPRS(n, base)	SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
-#define REST_GPR(n, base)	lwz	n,GPR0+4*(n)(base)
-#define REST_2GPRS(n, base)	REST_GPR(n, base); REST_GPR(n+1, base)
-#define REST_4GPRS(n, base)	REST_2GPRS(n, base); REST_2GPRS(n+2, base)
-#define REST_8GPRS(n, base)	REST_4GPRS(n, base); REST_4GPRS(n+4, base)
-#define REST_10GPRS(n, base)	REST_8GPRS(n, base); REST_2GPRS(n+8, base)
-
-/*
- * GCC sometimes accesses words at negative offsets from the stack
- * pointer, although the SysV ABI says it shouldn't.  To cope with
- * this, we leave this much untouched space on the stack on exception
- * entry.
- */
-#define STACK_UNDERHEAD	64
-
-#if 0	/* we don't use virtual addresses in PPCBOOT */
-#define tophys(rd,rs,rt)	addis	rd,rs,-KERNELBASE@h
-#define tovirt(rd,rs,rt)	addis	rd,rs,KERNELBASE@h
-#else
-#define tophys(rd,rs,rt)	mr	rd,rs
-#define tovirt(rd,rs,rt)	mr	rd,rs
-#endif
-
-/*
- * Exception entry code.  This code runs with address translation
- * turned off, i.e. using physical addresses.
- * We assume sprg3 has the physical address of the current
- * task's thread_struct.
- */
-#define EXCEPTION_PROLOG	\
-	mtspr	SPRG0,r20;	\
-	mtspr	SPRG1,r21;	\
-	mfcr	r20;		\
-	tophys(r21,r1,r21);		/* use tophys(kernel sp) otherwise */ \
-	subi	r21,r21,INT_FRAME_SIZE+STACK_UNDERHEAD;	/* alloc exc. frame */\
-1:	stw	r20,_CCR(r21);		/* save registers */ \
-	stw	r22,GPR22(r21);	\
-	stw	r23,GPR23(r21);	\
-	mfspr	r20,SPRG0;	\
-	stw	r20,GPR20(r21);	\
-	mfspr	r22,SPRG1;	\
-	stw	r22,GPR21(r21);	\
-	mflr	r20;		\
-	stw	r20,_LINK(r21);	\
-	mfctr	r22;		\
-	stw	r22,_CTR(r21);	\
-	mfspr	r20,XER;	\
-	stw	r20,_XER(r21);	\
-	mfspr	r22,SRR0;	\
-	mfspr	r23,SRR1;	\
-	stw	r0,GPR0(r21);	\
-	stw	r1,GPR1(r21);	\
-	stw	r2,GPR2(r21);	\
-	stw	r1,0(r21);	\
-	tovirt(r1,r21,r1);		/* set new kernel sp */	\
-	SAVE_4GPRS(3, r21);
-/*
- * Note: code which follows this uses cr0.eq (set if from kernel),
- * r21, r22 (SRR0), and r23 (SRR1).
- */
-
-/*
- * Exception vectors.
- *
- * The data words for `hdlr' and `int_return' are initialized with
- * OFFSET values only; they must be relocated first before they can
- * be used!
- */
-#define STD_EXCEPTION(n, label, hdlr)			\
-	. = n;						\
-label:							\
-	EXCEPTION_PROLOG;				\
-	lwz	r3,GOT(transfer_to_handler);		\
-	mtlr	r3;					\
-	addi	r3,r1,STACK_FRAME_OVERHEAD;		\
-	li	r20,MSR_KERNEL;				\
-	blrl	; 					\
-.L_ ## label :						\
-	.long	hdlr - _start + EXC_OFF_SYS_RESET;	\
-	.long	int_return - _start + EXC_OFF_SYS_RESET
-
-
-#endif	/* __PPC_ASM_TMPL__ */