diff options
| author | Rudolf Marek <r.marek@assembler.cz> | 2010-11-22 22:00:52 +0000 |
|---|---|---|
| committer | Rudolf Marek <r.marek@assembler.cz> | 2010-11-22 22:00:52 +0000 |
| commit | bcaea142f344389ed0c1857f53b7c8556a804c8d (patch) | |
| tree | fc693f89ea3e374f7d62dfdaabd46f946350af63 /src/arch/i386 | |
| parent | 9b5295f522fa08b84d222ba08f5801d8e812dbc6 (diff) | |
1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c
2) the patch implements get_cbmem_toc in chipset specific way if defined.
On Intel targets it should be unchanged. On K8T890 the the cbmem_toc is read from NVRAM. Why you ask? Because we cannot do it as on intel, because the framebuffer might be there making it hard to look for it in memory (and remember we need it so early that everying is uncached)
3) The patch removes hardcoded limits for suspend/resume save area (it was 1MB) on intel. Now it computes right numbers itself.
4) it impelements saving the memory during CAR to reserved range in sane way. First the sysinfo area (CAR data) is copied, then the rest after car is disabled (cached copy is used). I changed bit also the the copy of CAR area is now done uncached for target which I feel is more right.
I think I did not change the Intel suspend/resume behaviour but best would be if someone can test it. Please note this patch was unfinished on my drive since ages and it would be very nice to get it in to prevent bit rotten it again.
Now I feel it is done good way and should not break anything. I did a test with abuild and it seems fine.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386')
| -rw-r--r-- | src/arch/i386/boot/acpi.c | 11 | ||||
| -rw-r--r-- | src/arch/i386/boot/tables.c | 2 |
2 files changed, 1 insertions, 12 deletions
diff --git a/src/arch/i386/boot/acpi.c b/src/arch/i386/boot/acpi.c index 5264e13e0d..957ec4559a 100644 --- a/src/arch/i386/boot/acpi.c +++ b/src/arch/i386/boot/acpi.c @@ -470,17 +470,6 @@ void suspend_resume(void) { void *wake_vec; -#if 0 -#if CONFIG_MEM_TRAIN_SEQ != 0 - #error "So far it works on AMD and CONFIG_MEM_TRAIN_SEQ == 0" -#endif - -#if CONFIG_RAMBASE < 0x1F00000 - #error "For ACPI RESUME you need to have CONFIG_RAMBASE at least 31MB" - #error "Chipset support (S3_NVRAM_EARLY and ACPI_IS_WAKEUP_EARLY functions and memory ctrl)" - #error "And coreboot memory reserved in mainboard.c" -#endif -#endif /* If we happen to be resuming find wakeup vector and jump to OS. */ wake_vec = acpi_find_wakeup_vector(); if (wake_vec) diff --git a/src/arch/i386/boot/tables.c b/src/arch/i386/boot/tables.c index 69e0539126..d816e76750 100644 --- a/src/arch/i386/boot/tables.c +++ b/src/arch/i386/boot/tables.c @@ -214,7 +214,7 @@ struct lb_memory *write_tables(void) * it begin there during reboot time. We don't need the pointer, nor * the result right now. If it fails, ACPI resume will be disabled. */ - cbmem_add(CBMEM_ID_RESUME, 1024 * (1024-64)); + cbmem_add(CBMEM_ID_RESUME, HIGH_MEMORY_SAVE); #endif #if CONFIG_MULTIBOOT |