Refactor copy_and_run so that it uses a single code base instead of

3 (with one of them way too much assembler code).

On the way, I had to make some changes to the way the code is built, 
which is an effort I want to expand over time.
Right now, large portions of the in-ROM part of coreboot is compiled as 
a single file, with lots of .c files including other .c files.
That has its justification for pre-raminit code, but it also affects 
lots of post-raminit code (memcpy doesn't really make sense before 
raminit, or at least CAR)

The coreboot_apc code (AMD boards) gained some .c includes because I 
don't know that part of the code enough to really rework it and only 
have limited possibilities to test it. The includes should give an 
identical situation for this part of the code.

This change was posted as set of 6 patches to the list, but they
were mostly split for review purposes, hence commit them all at once.
They can still be backed up using the patch files, if necessary.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4233 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

4 files changed, 12 insertions, 96 deletions

diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb
index de83b6c417..c54e7053d0 100644
--- a/src/arch/i386/init/crt0.S.lb
+++ b/src/arch/i386/init/crt0.S.lb
@@ -69,106 +69,18 @@ __main:
 	 * the location it is compiled to run at.
 	 * Normally this is copying from FLASH ROM to RAM.
 	 */
-#if !CONFIG_COMPRESS
+	movl	%ebp, %esi
+	movl	$0x4000000, %esp
+	movl	%esp, %ebp
+	pushl %esi
 	movl	$_liseg, %esi
 	movl	$_iseg,  %edi
 	movl	$_eiseg, %ecx
 	subl	%edi, %ecx
-	movb	%cl, %al
-	shrl	$2, %ecx
-	andb	$3, %al
-	rep	movsl
-	movb	%al, %cl
-	rep	movsb
-#else
-	leal	4+_liseg, %esi
-	leal	_iseg, %edi
-	movl	%ebp, %esp	/* preserve %ebp */
-	movl	$-1, %ebp	/* last_m_off = -1 */
-	jmp	dcl1_n2b
-
-/* ------------- DECOMPRESSION -------------
-
- Input:
-   %esi - source
-   %edi - dest
-   %ebp - -1
-   cld
-
- Output:
-   %eax - 0
-   %ecx - 0
-*/
-
-.macro getbit bits
-.if	\bits == 1
-	addl	%ebx, %ebx
-	jnz	1f
-.endif
-	movl	(%esi), %ebx
-	subl	$-4, %esi	/* sets carry flag */
-	adcl	%ebx, %ebx
-1:
-.endm
-
-decompr_literals_n2b:
-	movsb
-
-decompr_loop_n2b:
-	addl	%ebx, %ebx
-	jnz	dcl2_n2b
-dcl1_n2b:
-	getbit	32
-dcl2_n2b:
-	jc	decompr_literals_n2b
-	xorl	%eax, %eax
-	incl	%eax		/* m_off = 1 */
-loop1_n2b:
-	getbit	1
-	adcl	%eax, %eax	/* m_off = m_off*2 + getbit() */
-	getbit	1
-	jnc	loop1_n2b	/* while(!getbit()) */
-	xorl	%ecx, %ecx
-	subl	$3, %eax
-	jb	decompr_ebpeax_n2b	/* if (m_off == 2) goto decompr_ebpeax_n2b ? */
-	shll	$8, %eax	
-	movb	(%esi), %al	/* m_off = (m_off - 3)*256 + src[ilen++] */
-	incl	%esi
-	xorl	$-1, %eax	
-	jz	decompr_end_n2b	/* if (m_off == 0xffffffff) goto decomp_end_n2b */
-	movl	%eax, %ebp	/* last_m_off = m_off ?*/
-decompr_ebpeax_n2b:
-	getbit	1		
-	adcl	%ecx, %ecx	/* m_len = getbit() */
-	getbit	1
-	adcl	%ecx, %ecx	/* m_len = m_len*2 + getbit()) */
-	jnz	decompr_got_mlen_n2b	/* if (m_len == 0) goto decompr_got_mlen_n2b */
-	incl	%ecx		/* m_len++ */
-loop2_n2b:
-	getbit	1	
-	adcl	%ecx, %ecx	/* m_len = m_len*2 + getbit() */
-	getbit	1
-	jnc	loop2_n2b	/* while(!getbit()) */
-	incl	%ecx
-	incl	%ecx		/* m_len += 2 */
-decompr_got_mlen_n2b:
-	cmpl	$-0xd00, %ebp
-	adcl	$1, %ecx	/* m_len = m_len + 1 + (last_m_off > 0xd00) */
-	movl	%esi, %edx
-	leal	(%edi,%ebp), %esi	/* m_pos = dst + olen + -m_off  */
-	rep
-	movsb			/* dst[olen++] = *m_pos++ while(m_len > 0) */
-	movl	%edx, %esi
-	jmp	decompr_loop_n2b
-decompr_end_n2b:
-	intel_chip_post_macro(0x12)		/* post 12 */
-
-	movl	%esp, %ebp
-#endif
-
-	CONSOLE_DEBUG_TX_STRING($str_pre_main)
-	leal	_iseg, %edi
-	jmp	*%edi
+	pushl %ecx
+	pushl %edi
+	pushl %esi
+	call copy_and_run_core
 
 .Lhlt:	
 	intel_chip_post_macro(0xee)	/* post fe */
diff --git a/src/arch/i386/init/ldscript.lb b/src/arch/i386/init/ldscript.lb
index 99b0ce55bf..50a8c9965d 100644
--- a/src/arch/i386/init/ldscript.lb
+++ b/src/arch/i386/init/ldscript.lb
@@ -48,6 +48,7 @@ SECTIONS
 		_rom = .;
 		*(.rom.text);
 		*(.rom.data);
+		*(.rodata.*);
 		*(.rom.data.*);
 		. = ALIGN(16);
 		_erom = .;
diff --git a/src/arch/i386/init/ldscript_failover.lb b/src/arch/i386/init/ldscript_failover.lb
index 79fd7b4b96..064f159a50 100644
--- a/src/arch/i386/init/ldscript_failover.lb
+++ b/src/arch/i386/init/ldscript_failover.lb
@@ -42,6 +42,7 @@ SECTIONS
 		*(.rom.text);
 		*(.rom.data);
 		*(.rom.data.*);
+		*(.rodata.*);
 		. = ALIGN(16);
 		_erom = .;
 	}
diff --git a/src/arch/i386/init/ldscript_fallback.lb b/src/arch/i386/init/ldscript_fallback.lb
index 3fced4c387..a46c374520 100644
--- a/src/arch/i386/init/ldscript_fallback.lb
+++ b/src/arch/i386/init/ldscript_fallback.lb
@@ -52,6 +52,8 @@ SECTIONS
 		_rom = .;
 		*(.rom.text);
 		*(.rom.data);
+		*(.init.rodata.*);
+		*(.rodata.*);
 		*(.rom.data.*);
 		. = ALIGN(16);
 		_erom = .;