This patch unifies the use of config options in v2 to all start with CONFIG_

It's basically done with the following script and some manual fixup:

VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
	find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 29 insertions, 29 deletions

diff --git a/src/arch/i386/boot/Config.lb b/src/arch/i386/boot/Config.lb
index 4b22010461..9c576921a0 100644
--- a/src/arch/i386/boot/Config.lb
+++ b/src/arch/i386/boot/Config.lb
@@ -1,7 +1,7 @@
-uses HAVE_PIRQ_TABLE
-uses HAVE_ACPI_TABLES
+uses CONFIG_HAVE_PIRQ_TABLE
+uses CONFIG_HAVE_ACPI_TABLES
 uses CONFIG_MULTIBOOT
-uses HAVE_ACPI_RESUME
+uses CONFIG_HAVE_ACPI_RESUME
 
 object boot.o
 object coreboot_table.o
@@ -9,13 +9,13 @@ if CONFIG_MULTIBOOT
 object multiboot.o
 end
 object tables.o
-if HAVE_PIRQ_TABLE
+if CONFIG_HAVE_PIRQ_TABLE
 object pirq_routing.o 
 end
-if HAVE_ACPI_TABLES
+if CONFIG_HAVE_ACPI_TABLES
 object acpi.o
 object acpigen.o
-if HAVE_ACPI_RESUME
+if CONFIG_HAVE_ACPI_RESUME
 object wakeup.S
 end
 end
diff --git a/src/arch/i386/boot/acpi.c b/src/arch/i386/boot/acpi.c
index 658c1b32d8..c0c57190ad 100644
--- a/src/arch/i386/boot/acpi.c
+++ b/src/arch/i386/boot/acpi.c
@@ -390,18 +390,18 @@ void acpi_write_rsdp(acpi_rsdp_t *rsdp, acpi_rsdt_t *rsdt)
 	rsdp->ext_checksum	= acpi_checksum((void *)rsdp, sizeof(acpi_rsdp_t));
 }
 
-#if HAVE_ACPI_RESUME == 1
+#if CONFIG_HAVE_ACPI_RESUME == 1
 void suspend_resume(void)
 {
 	void *wake_vec;
 
 #if 0
-#if MEM_TRAIN_SEQ != 0
-	#error "So far it works on AMD and MEM_TRAIN_SEQ == 0"
+#if CONFIG_MEM_TRAIN_SEQ != 0
+	#error "So far it works on AMD and CONFIG_MEM_TRAIN_SEQ == 0"
 #endif
 
-#if _RAMBASE < 0x1F00000
-	#error "For ACPI RESUME you need to have _RAMBASE at least 31MB"
+#if CONFIG_RAMBASE < 0x1F00000
+	#error "For ACPI RESUME you need to have CONFIG_RAMBASE at least 31MB"
 	#error "Chipset support (S3_NVRAM_EARLY and ACPI_IS_WAKEUP_EARLY functions and memory ctrl)"
 	#error "And coreboot memory reserved in mainboard.c"
 #endif
diff --git a/src/arch/i386/boot/coreboot_table.c b/src/arch/i386/boot/coreboot_table.c
index 431ff368cd..659ab0f90e 100644
--- a/src/arch/i386/boot/coreboot_table.c
+++ b/src/arch/i386/boot/coreboot_table.c
@@ -76,15 +76,15 @@ struct lb_memory *lb_memory(struct lb_header *header)
 
 struct lb_serial *lb_serial(struct lb_header *header)
 {
-#if defined(TTYS0_BASE)
+#if defined(CONFIG_TTYS0_BASE)
 	struct lb_record *rec;
 	struct lb_serial *serial;
 	rec = lb_new_record(header);
 	serial = (struct lb_serial *)rec;
 	serial->tag = LB_TAG_SERIAL;
 	serial->size = sizeof(*serial);
-	serial->ioport = TTYS0_BASE;
-	serial->baud = TTYS0_BAUD;
+	serial->ioport = CONFIG_TTYS0_BASE;
+	serial->baud = CONFIG_TTYS0_BAUD;
 	return serial;
 #else
 	return header;
@@ -157,9 +157,9 @@ struct cmos_checksum *lb_cmos_checksum(struct lb_header *header)
 
 	cmos_checksum->size = (sizeof(*cmos_checksum));
 
-	cmos_checksum->range_start = LB_CKS_RANGE_START * 8;
-	cmos_checksum->range_end = ( LB_CKS_RANGE_END * 8 ) + 7;
-	cmos_checksum->location = LB_CKS_LOC * 8;
+	cmos_checksum->range_start = CONFIG_LB_CKS_RANGE_START * 8;
+	cmos_checksum->range_end = ( CONFIG_LB_CKS_RANGE_END * 8 ) + 7;
+	cmos_checksum->location = CONFIG_LB_CKS_LOC * 8;
 	cmos_checksum->type = CHECKSUM_PCBIOS;
 	
 	return cmos_checksum;
@@ -413,7 +413,7 @@ static struct lb_memory *build_lb_mem(struct lb_header *head)
 	return mem;
 }
 
-#if HAVE_HIGH_TABLES == 1
+#if CONFIG_HAVE_HIGH_TABLES == 1
 extern uint64_t high_tables_base, high_tables_size;
 #endif
 
@@ -424,7 +424,7 @@ unsigned long write_coreboot_table(
 	struct lb_header *head;
 	struct lb_memory *mem;
 
-#if HAVE_HIGH_TABLES == 1
+#if CONFIG_HAVE_HIGH_TABLES == 1
 	printk_debug("Writing high table forward entry at 0x%08lx\n",
 			low_table_end);
 	head = lb_table_init(low_table_end);
@@ -460,7 +460,7 @@ unsigned long write_coreboot_table(
 	rom_table_end &= ~0xffff;
 	printk_debug("0x%08lx \n", rom_table_end);
 
-#if (HAVE_OPTION_TABLE == 1) 
+#if (CONFIG_HAVE_OPTION_TABLE == 1) 
 	{
 		struct lb_record *rec_dest, *rec_src;
 		/* Write the option config table... */
@@ -482,13 +482,13 @@ unsigned long write_coreboot_table(
 	lb_add_memory_range(mem, LB_MEM_TABLE, 
 		rom_table_start, rom_table_end-rom_table_start);
 
-#if HAVE_HIGH_TABLES == 1
+#if CONFIG_HAVE_HIGH_TABLES == 1
 	printk_debug("Adding high table area\n");
 	lb_add_memory_range(mem, LB_MEM_TABLE,
 		high_tables_base, high_tables_size);
 #endif
 
-#if (HAVE_MAINBOARD_RESOURCES == 1)
+#if (CONFIG_HAVE_MAINBOARD_RESOURCES == 1)
 	add_mainboard_resources(mem);
 #endif
 
diff --git a/src/arch/i386/boot/pirq_routing.c b/src/arch/i386/boot/pirq_routing.c
index 598cc3ca8d..0c470082e0 100644
--- a/src/arch/i386/boot/pirq_routing.c
+++ b/src/arch/i386/boot/pirq_routing.c
@@ -3,7 +3,7 @@
 #include <string.h>
 #include <device/pci.h>
 
-#if (DEBUG==1 && HAVE_PIRQ_TABLE==1)
+#if (CONFIG_DEBUG==1 && CONFIG_HAVE_PIRQ_TABLE==1)
 static void check_pirq_routing_table(struct irq_routing_table *rt)
 {
 	uint8_t *addr = (uint8_t *)rt;
@@ -12,7 +12,7 @@ static void check_pirq_routing_table(struct irq_routing_table *rt)
 
 	printk_info("Checking Interrupt Routing Table consistency...\n");
 
-#if defined(IRQ_SLOT_COUNT)
+#if defined(CONFIG_IRQ_SLOT_COUNT)
 	if (sizeof(struct irq_routing_table) != rt->size) {
 		printk_warning("Inconsistent Interrupt Routing Table size (0x%x/0x%x).\n",
 			       sizeof(struct irq_routing_table),
@@ -83,7 +83,7 @@ static int verify_copy_pirq_routing_table(unsigned long addr)
 #define verify_copy_pirq_routing_table(addr)
 #endif
 
-#if HAVE_PIRQ_TABLE==1
+#if CONFIG_HAVE_PIRQ_TABLE==1
 unsigned long copy_pirq_routing_table(unsigned long addr)
 {
 	/* Align the table to be 16 byte aligned. */
@@ -100,7 +100,7 @@ unsigned long copy_pirq_routing_table(unsigned long addr)
 }
 #endif
 
-#if (PIRQ_ROUTE==1 && HAVE_PIRQ_TABLE==1)
+#if (CONFIG_PIRQ_ROUTE==1 && CONFIG_HAVE_PIRQ_TABLE==1)
 void pirq_routing_irqs(unsigned long addr)
 {
 	int i, j, k, num_entries;
diff --git a/src/arch/i386/boot/tables.c b/src/arch/i386/boot/tables.c
index 2dbfa7adcc..9991415eda 100644
--- a/src/arch/i386/boot/tables.c
+++ b/src/arch/i386/boot/tables.c
@@ -104,7 +104,7 @@ struct lb_memory *write_tables(void)
 	post_code(0x9a);
 
 	/* Write ACPI tables to F segment and high tables area */
-#if HAVE_ACPI_TABLES == 1
+#if CONFIG_HAVE_ACPI_TABLES == 1
 	if (high_tables_base) {
 		unsigned long acpi_start = high_table_end;
 		rom_table_end = ALIGN(rom_table_end, 16);
@@ -129,7 +129,7 @@ struct lb_memory *write_tables(void)
 #endif
 	post_code(0x9b);
 
-#if HAVE_MP_TABLE == 1
+#if CONFIG_HAVE_MP_TABLE == 1
 	/* The smp table must be in 0-1K, 639K-640K, or 960K-1M */
 	rom_table_end = write_smp_table(rom_table_end);
 	rom_table_end = ALIGN(rom_table_end, 1024);
@@ -139,7 +139,7 @@ struct lb_memory *write_tables(void)
 		high_table_end = write_smp_table(high_table_end);
 		high_table_end = ALIGN(high_table_end, 1024);
 	}
-#endif /* HAVE_MP_TABLE */
+#endif /* CONFIG_HAVE_MP_TABLE */
 
 	post_code(0x9c);