diff options
| author | Roman Kononov <kononov@dls.net> | 2008-07-23 23:22:59 +0000 |
|---|---|---|
| committer | Marc Jones <marc.jones@amd.com> | 2008-07-23 23:22:59 +0000 |
| commit | 96e3022cd411db8070716fbc324f8c60137dcfc3 (patch) | |
| tree | 73de889bf18fde837c528cf6faa337b22f844bc5 /src/arch/i386/boot/coreboot_table.c | |
| parent | 2aa804fdccd978afc7ce4d7e5aa86cccc7e4d94e (diff) | |
This patch fixes the kernel EBDA mislocation problem. Thank you, Yinghai.
The change in tables.c protects the legacy x86 BIOS data segment
(0x400-0x4ff) from being used for storing coreboot tables. Some
bytes from the segment are used by the kernel and should not be
garbled.
The change in coreboot_table.c is not strictly necessary. It removes
some redundancy and confusion.
Signed-off-by: Roman Kononov <kononov@dls.net>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3437 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386/boot/coreboot_table.c')
| -rw-r--r-- | src/arch/i386/boot/coreboot_table.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/arch/i386/boot/coreboot_table.c b/src/arch/i386/boot/coreboot_table.c index 9dd6a3299a..900ab7c106 100644 --- a/src/arch/i386/boot/coreboot_table.c +++ b/src/arch/i386/boot/coreboot_table.c @@ -402,7 +402,6 @@ unsigned long write_coreboot_table( unsigned long low_table_start, unsigned long low_table_end, unsigned long rom_table_start, unsigned long rom_table_end) { - unsigned long table_size; struct lb_header *head; struct lb_memory *mem; @@ -445,9 +444,8 @@ unsigned long write_coreboot_table( low_table_start, low_table_end - low_table_start); /* Record the pirq table, acpi tables, and maybe the mptable */ - table_size=rom_table_end-rom_table_start; lb_add_memory_range(mem, LB_MEM_TABLE, - rom_table_start, table_size<0x10000?0x10000:table_size); + rom_table_start, rom_table_end-rom_table_start); /* Note: * I assume that there is always memory at immediately after |