diff options
author | David Hendricks <dhendrix@chromium.org> | 2013-01-17 15:07:35 -0800 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-01-18 00:26:53 +0100 |
commit | fba42a793a67d8910b4ab7fdfb386bcda9896d13 (patch) | |
tree | 44edd08ae28e4260ad1cdbad4cccb40be4f840ce /src/arch/armv7/romstage.ld | |
parent | 1c706dc85830a1d91c7ff7c99ac48efd8d085613 (diff) |
Snow bootblock (bloated/debug version)
This is the bloated Snow bootblock which includes:
- SPI driver
- UART, including requisite I2C, Maxim PMIC, and clock config code.
- Adjustments for magic offsets (id section, stack pointer address)
This is just a temporary solution until we have romstage loading.
Once that happens, we'll rip out all but the code necessary for
copying SPI ROM content into SRAM.
Change-Id: I2a11e272eb9b6f626b5d9783eabb4a720a1d06be
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2170
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/armv7/romstage.ld')
-rw-r--r-- | src/arch/armv7/romstage.ld | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/armv7/romstage.ld b/src/arch/armv7/romstage.ld index 61e3479cae..d40d2ef44a 100644 --- a/src/arch/armv7/romstage.ld +++ b/src/arch/armv7/romstage.ld @@ -35,11 +35,11 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) -ENTRY(_start) +/* ENTRY(_start) */ SECTIONS { - . = CONFIG_ROMSTAGE_BASE; + . = 0x02023400 + 0x4000; .romtext . : { _rom = .; |