ARMv7: flatten arch/armv7 source tree

With only 19 source files it doesn't make a whole lot of sense to
create sub directories in arch/armv7, especially since the files
were distributed somewhat randomly.

Change-Id: I029c7848e915edf1737e1c401c034837c95d179d
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3659
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

3 files changed, 0 insertions, 280 deletions

diff --git a/src/arch/armv7/boot/Makefile.inc b/src/arch/armv7/boot/Makefile.inc
deleted file mode 100644
index 8d24fae10e..0000000000
--- a/src/arch/armv7/boot/Makefile.inc
+++ /dev/null
@@ -1,12 +0,0 @@
-ramstage-y += boot.c
-#ramstage-$(CONFIG_MULTIBOOT) += multiboot.c
-ramstage-y += tables.c
-#ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
-#ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpigen.c
-#ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
-
-#FIXME(dhendrix): is there anything preventing multiboot from
-#working on ARM?
-
-$(obj)/arch/armv7/boot/coreboot_table.ramstage.o : $(OPTION_TABLE_H)
-#$(obj)/arch/x86/boot/smbios.ramstage.o: $(obj)/build.h
diff --git a/src/arch/armv7/boot/boot.c b/src/arch/armv7/boot/boot.c
deleted file mode 100644
index ab531be868..0000000000
--- a/src/arch/armv7/boot/boot.c
+++ /dev/null
@@ -1,189 +0,0 @@
-#include <console/console.h>
-#include <ip_checksum.h>
-#include <boot/elf.h>
-#include <boot/elf_boot.h>
-#include <string.h>
-#include <cpu/x86/multiboot.h>
-#include <arch/stages.h>
-
-
-#ifndef CMD_LINE
-#define CMD_LINE ""
-#endif
-
-
-
-#define UPSZ(X) ((sizeof(X) + 3) &~3)
-
-static struct {
-	Elf_Bhdr hdr;
-	Elf_Nhdr ft_hdr;
-	unsigned char ft_desc[UPSZ(FIRMWARE_TYPE)];
-	Elf_Nhdr bl_hdr;
-	unsigned char bl_desc[UPSZ(BOOTLOADER)];
-	Elf_Nhdr blv_hdr;
-	unsigned char blv_desc[UPSZ(BOOTLOADER_VERSION)];
-	Elf_Nhdr cmd_hdr;
-	unsigned char cmd_desc[UPSZ(CMD_LINE)];
-} elf_boot_notes = {
-	.hdr = {
-		.b_signature = 0x0E1FB007,
-		.b_size = sizeof(elf_boot_notes),
-		.b_checksum = 0,
-		.b_records = 4,
-	},
-	.ft_hdr = {
-		.n_namesz = 0,
-		.n_descsz = sizeof(FIRMWARE_TYPE),
-		.n_type = EBN_FIRMWARE_TYPE,
-	},
-	.ft_desc = FIRMWARE_TYPE,
-	.bl_hdr = {
-		.n_namesz = 0,
-		.n_descsz = sizeof(BOOTLOADER),
-		.n_type = EBN_BOOTLOADER_NAME,
-	},
-	.bl_desc = BOOTLOADER,
-	.blv_hdr = {
-		.n_namesz = 0,
-		.n_descsz = sizeof(BOOTLOADER_VERSION),
-		.n_type = EBN_BOOTLOADER_VERSION,
-	},
-	.blv_desc = BOOTLOADER_VERSION,
-	.cmd_hdr = {
-		.n_namesz = 0,
-		.n_descsz = sizeof(CMD_LINE),
-		.n_type = EBN_COMMAND_LINE,
-	},
-	.cmd_desc = CMD_LINE,
-};
-
-
-int elf_check_arch(Elf_ehdr *ehdr)
-{
-	return (
-		((ehdr->e_machine == EM_386) ||	(ehdr->e_machine == EM_486)) &&
-		(ehdr->e_ident[EI_CLASS] == ELFCLASS32) &&
-		(ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
-		);
-
-}
-
-void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
-{
-	extern unsigned char _ram_seg, _eram_seg;
-	unsigned long lb_start, lb_size;
-	unsigned long adjust, adjusted_boot_notes;
-
-	elf_boot_notes.hdr.b_checksum =
-		compute_ip_checksum(&elf_boot_notes, sizeof(elf_boot_notes));
-
-	lb_start = (unsigned long)&_ram_seg;
-	lb_size = (unsigned long)(&_eram_seg - &_ram_seg);
-	adjust = buffer +  size - lb_start;
-
-	adjusted_boot_notes = (unsigned long)&elf_boot_notes;
-	adjusted_boot_notes += adjust;
-
-	printk(BIOS_SPEW, "entry    = 0x%08lx\n", (unsigned long)entry);
-	printk(BIOS_SPEW, "lb_start = 0x%08lx\n", lb_start);
-	printk(BIOS_SPEW, "lb_size  = 0x%08lx\n", lb_size);
-	printk(BIOS_SPEW, "adjust   = 0x%08lx\n", adjust);
-	printk(BIOS_SPEW, "buffer   = 0x%08lx\n", buffer);
-	printk(BIOS_SPEW, "     elf_boot_notes = 0x%08lx\n", (unsigned long)&elf_boot_notes);
-	printk(BIOS_SPEW, "adjusted_boot_notes = 0x%08lx\n", adjusted_boot_notes);
-
-	stage_exit(entry);
-#if 0
-	/* FIXME: do we need any of this? */
-	/* Jump to kernel */
-	__asm__ __volatile__(
-		"	cld	\n\t"
-		/* Save the callee save registers... */
-		"	pushl	%%esi\n\t"
-		"	pushl	%%edi\n\t"
-		"	pushl	%%ebx\n\t"
-		/* Save the parameters I was passed */
-		"	pushl	$0\n\t" /* 20 adjust */
-	        "	pushl	%0\n\t" /* 16 lb_start */
-		"	pushl	%1\n\t" /* 12 buffer */
-		"	pushl	%2\n\t" /*  8 lb_size */
-		"	pushl	%3\n\t" /*  4 entry */
-		"	pushl	%4\n\t" /*  0 elf_boot_notes */
-		/* Compute the adjustment */
-		"	xorl	%%eax, %%eax\n\t"
-		"	subl	16(%%esp), %%eax\n\t"
-		"	addl	12(%%esp), %%eax\n\t"
-		"	addl	 8(%%esp), %%eax\n\t"
-		"	movl	%%eax, 20(%%esp)\n\t"
-		/* Place a copy of coreboot in its new location */
-		/* Move ``longs'' the coreboot size is 4 byte aligned */
-		"	movl	12(%%esp), %%edi\n\t"
-		"	addl	 8(%%esp), %%edi\n\t"
-		"	movl	16(%%esp), %%esi\n\t"
-		"	movl	 8(%%esp), %%ecx\n\n"
-		"	shrl	$2, %%ecx\n\t"
-		"	rep	movsl\n\t"
-
-		/* Adjust the stack pointer to point into the new coreboot image */
-		"	addl	20(%%esp), %%esp\n\t"
-		/* Adjust the instruction pointer to point into the new coreboot image */
-		"	movl	$1f, %%eax\n\t"
-		"	addl	20(%%esp), %%eax\n\t"
-		"	jmp	*%%eax\n\t"
-		"1:	\n\t"
-
-		/* Copy the coreboot bounce buffer over coreboot */
-		/* Move ``longs'' the coreboot size is 4 byte aligned */
-		"	movl	16(%%esp), %%edi\n\t"
-		"	movl	12(%%esp), %%esi\n\t"
-		"	movl	 8(%%esp), %%ecx\n\t"
-		"	shrl	$2, %%ecx\n\t"
-		"	rep	movsl\n\t"
-
-		/* Now jump to the loaded image */
-		"	movl	%5, %%eax\n\t"
-		"	movl	 0(%%esp), %%ebx\n\t"
-		"	call	*4(%%esp)\n\t"
-
-		/* The loaded image returned? */
-		"	cli	\n\t"
-		"	cld	\n\t"
-
-		/* Copy the saved copy of coreboot where coreboot runs */
-		/* Move ``longs'' the coreboot size is 4 byte aligned */
-		"	movl	16(%%esp), %%edi\n\t"
-		"	movl	12(%%esp), %%esi\n\t"
-		"	addl	 8(%%esp), %%esi\n\t"
-		"	movl	 8(%%esp), %%ecx\n\t"
-		"	shrl	$2, %%ecx\n\t"
-		"	rep	movsl\n\t"
-
-		/* Adjust the stack pointer to point into the old coreboot image */
-		"	subl	20(%%esp), %%esp\n\t"
-
-		/* Adjust the instruction pointer to point into the old coreboot image */
-		"	movl	$1f, %%eax\n\t"
-		"	subl	20(%%esp), %%eax\n\t"
-		"	jmp	*%%eax\n\t"
-		"1:	\n\t"
-
-		/* Drop the parameters I was passed */
-		"	addl	$24, %%esp\n\t"
-
-		/* Restore the callee save registers */
-		"	popl	%%ebx\n\t"
-		"	popl	%%edi\n\t"
-		"	popl	%%esi\n\t"
-
-		::
-		"ri" (lb_start), "ri" (buffer), "ri" (lb_size),
-		"ri" (entry),
-#if CONFIG_MULTIBOOT
-		"ri"(mbi), "ri" (MB_MAGIC2)
-#else
-		"ri"(adjusted_boot_notes), "ri" (0x0E1FB007)
-#endif
-		);
-#endif
-}
diff --git a/src/arch/armv7/boot/tables.c b/src/arch/armv7/boot/tables.c
deleted file mode 100644
index 0fc7399c13..0000000000
--- a/src/arch/armv7/boot/tables.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2003 Eric Biederman
- * Copyright (C) 2005 Steve Magnani
- * Copyright (C) 2008-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <console/console.h>
-#include <cpu/cpu.h>
-#include <boot/tables.h>
-#include <boot/coreboot_tables.h>
-#include <string.h>
-#include <cbmem.h>
-#include <lib.h>
-
-#define MAX_COREBOOT_TABLE_SIZE (8 * 1024)
-
-/*
- * TODO: "High" tables are a convention used on x86. Maybe we can
- * clean up that naming at some point.
- */
-uint64_t high_tables_base = 0;
-uint64_t high_tables_size;
-
-void cbmem_arch_init(void)
-{
-}
-
-struct lb_memory *write_tables(void)
-{
-	unsigned long table_pointer, new_table_pointer;
-
-	if (!high_tables_base) {
-		printk(BIOS_ERR, "ERROR: high_tables_base is not set.\n");
-	}
-
-	printk(BIOS_DEBUG, "high_tables_base: %llx.\n", high_tables_base);
-
-	post_code(0x9d);
-
-	table_pointer = (unsigned long)cbmem_add(CBMEM_ID_CBTABLE,
-						MAX_COREBOOT_TABLE_SIZE);
-	if (!table_pointer) {
-		printk(BIOS_ERR, "Could not add CBMEM for coreboot table.\n");
-		return NULL;
-	}
-
-	new_table_pointer = write_coreboot_table(0UL, 0UL,
-				table_pointer, table_pointer);
-
-	if (new_table_pointer > (table_pointer + MAX_COREBOOT_TABLE_SIZE)) {
-		printk(BIOS_ERR, "coreboot table didn't fit (%lx/%x bytes)\n",
-			   new_table_pointer - table_pointer, MAX_COREBOOT_TABLE_SIZE);
-	}
-
-	printk(BIOS_DEBUG, "coreboot table: %ld bytes.\n",
-			new_table_pointer - table_pointer);
-
-	post_code(0x9e);
-
-	/* Print CBMEM sections */
-	cbmem_list();
-
-	return get_lb_mem();
-}